diff options
| author | Patrick Rudolph <patrick.rudolph@9elements.com> | 2020-12-14 16:18:04 +0100 |
|---|---|---|
| committer | Hung-Te Lin <hungte@chromium.org> | 2020-12-17 06:22:55 +0000 |
| commit | 2031221fbda5100556933fb225f9199b88aeebac (patch) | |
| tree | d3d2d32efb89160cb1f3bb51e33df0f57f405700 /src/mainboard/google | |
| parent | 8b56c8c6b2694500318eba14e291a0586837ebe8 (diff) | |
| download | coreboot-2031221fbda5100556933fb225f9199b88aeebac.tar.xz | |
soc/intel/cannonlake: Change mainboard_silicon_init_params argument
Use FSPS_UPD instead of FSP_S_CONFIG as argument as already done on
xeon_sp and denverton_ns. This allows to set test config UPDs from
mainboard code as well.
Change-Id: I6d67264e22df32b9210ce88b99d6a7a4f6b97ffb
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48644
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Diffstat (limited to 'src/mainboard/google')
| -rw-r--r-- | src/mainboard/google/hatch/ramstage.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/hatch/ramstage.c b/src/mainboard/google/hatch/ramstage.c index af8810063c..93864b2ad1 100644 --- a/src/mainboard/google/hatch/ramstage.c +++ b/src/mainboard/google/hatch/ramstage.c @@ -8,7 +8,7 @@ #include <variant/gpio.h> #include <vendorcode/google/chromeos/chromeos.h> -void mainboard_silicon_init_params(FSP_S_CONFIG *params) +void mainboard_silicon_init_params(FSPS_UPD *supd) { variant_devtree_update(); } |