diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2018-06-08 19:00:44 +0200 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2018-06-09 17:24:07 +0000 |
| commit | 4b73fa97ce98adda75e889ddbb759022e6cb11b2 (patch) | |
| tree | a844fe813a095ad8f3091403c2d00ec740c2f9a6 /src/mainboard/google | |
| parent | 5cb876cc1fef34e238e37facb36a77dbc45ced9a (diff) | |
| download | coreboot-4b73fa97ce98adda75e889ddbb759022e6cb11b2.tar.xz | |
mainboard: Get rid of device_t
Use of device_t has been abandoned in ramstage.
Use pci_devfn_t or pnp_devfn_t instead of device_t in romstage.
Change-Id: Ie0ae3972eacc97ae154dad4fafd171aa1f38683a
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26984
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google')
| -rw-r--r-- | src/mainboard/google/beltino/chromeos.c | 6 | ||||
| -rw-r--r-- | src/mainboard/google/butterfly/chromeos.c | 2 | ||||
| -rw-r--r-- | src/mainboard/google/jecht/chromeos.c | 6 | ||||
| -rw-r--r-- | src/mainboard/google/parrot/chromeos.c | 2 | ||||
| -rw-r--r-- | src/mainboard/google/stout/chromeos.c | 4 |
5 files changed, 12 insertions, 8 deletions
diff --git a/src/mainboard/google/beltino/chromeos.c b/src/mainboard/google/beltino/chromeos.c index 7412c62ab0..ad4eab98b1 100644 --- a/src/mainboard/google/beltino/chromeos.c +++ b/src/mainboard/google/beltino/chromeos.c @@ -48,10 +48,11 @@ void fill_lb_gpios(struct lb_gpios *gpios) int get_write_protect_state(void) { - device_t dev; #ifdef __PRE_RAM__ + pci_devfn_t dev; dev = PCI_DEV(0, 0x1f, 2); #else + struct device *dev; dev = dev_find_slot(0, PCI_DEVFN(0x1f, 2)); #endif return (pci_read_config32(dev, SATA_SP) >> FLAG_SPI_WP) & 1; @@ -59,10 +60,11 @@ int get_write_protect_state(void) int get_recovery_mode_switch(void) { - device_t dev; #ifdef __PRE_RAM__ + pci_devfn_t dev; dev = PCI_DEV(0, 0x1f, 2); #else + struct device *dev; dev = dev_find_slot(0, PCI_DEVFN(0x1f, 2)); #endif return (pci_read_config32(dev, SATA_SP) >> FLAG_REC_MODE) & 1; diff --git a/src/mainboard/google/butterfly/chromeos.c b/src/mainboard/google/butterfly/chromeos.c index 42f61896ea..7a74ed5e47 100644 --- a/src/mainboard/google/butterfly/chromeos.c +++ b/src/mainboard/google/butterfly/chromeos.c @@ -37,7 +37,7 @@ void fill_lb_gpios(struct lb_gpios *gpios) { - device_t dev = dev_find_slot(0, PCI_DEVFN(0x1f,0)); + struct device *dev = dev_find_slot(0, PCI_DEVFN(0x1f, 0)); u16 gpio_base = pci_read_config16(dev, GPIOBASE) & 0xfffe; int lidswitch = 0; diff --git a/src/mainboard/google/jecht/chromeos.c b/src/mainboard/google/jecht/chromeos.c index f99fd6d438..c7925fdd65 100644 --- a/src/mainboard/google/jecht/chromeos.c +++ b/src/mainboard/google/jecht/chromeos.c @@ -51,10 +51,11 @@ void fill_lb_gpios(struct lb_gpios *gpios) int get_write_protect_state(void) { - device_t dev; #ifdef __PRE_RAM__ + pci_devfn_t dev; dev = PCI_DEV(0, 0x1f, 2); #else + struct device *dev; dev = dev_find_slot(0, PCI_DEVFN(0x1f, 2)); #endif return (pci_read_config32(dev, SATA_SP) >> FLAG_SPI_WP) & 1; @@ -62,10 +63,11 @@ int get_write_protect_state(void) int get_recovery_mode_switch(void) { - device_t dev; #ifdef __PRE_RAM__ + pci_devfn_t dev; dev = PCI_DEV(0, 0x1f, 2); #else + struct device *dev; dev = dev_find_slot(0, PCI_DEVFN(0x1f, 2)); #endif return (pci_read_config32(dev, SATA_SP) >> FLAG_REC_MODE) & 1; diff --git a/src/mainboard/google/parrot/chromeos.c b/src/mainboard/google/parrot/chromeos.c index d2448eb253..b82efbaea9 100644 --- a/src/mainboard/google/parrot/chromeos.c +++ b/src/mainboard/google/parrot/chromeos.c @@ -34,7 +34,7 @@ void fill_lb_gpios(struct lb_gpios *gpios) { - device_t dev = dev_find_slot(0, PCI_DEVFN(0x1f,0)); + struct device *dev = dev_find_slot(0, PCI_DEVFN(0x1f, 0)); u16 gpio_base = pci_read_config32(dev, GPIOBASE) & 0xfffe; u16 gen_pmcon_1 = pci_read_config32(dev, GEN_PMCON_1); diff --git a/src/mainboard/google/stout/chromeos.c b/src/mainboard/google/stout/chromeos.c index 047e6a1fcb..6d77a2aead 100644 --- a/src/mainboard/google/stout/chromeos.c +++ b/src/mainboard/google/stout/chromeos.c @@ -97,11 +97,11 @@ int get_lid_switch(void) int get_recovery_mode_switch(void) { #ifdef __PRE_RAM__ - device_t dev = PCI_DEV(0, 0x1f, 0); + pci_devfn_t dev = PCI_DEV(0, 0x1f, 0); #else static int ec_in_rec_mode = 0; static int ec_rec_flag_good = 0; - device_t dev = dev_find_slot(0, PCI_DEVFN(0x1f,0)); + struct device *dev = dev_find_slot(0, PCI_DEVFN(0x1f, 0)); #endif u8 ec_status = ec_read(EC_STATUS_REG); |