diff options
author | Julius Werner <jwerner@chromium.org> | 2017-07-14 14:25:39 -0700 |
---|---|---|
committer | Julius Werner <jwerner@chromium.org> | 2017-07-19 18:15:10 +0000 |
commit | 4ed8b305539f661895d9fa950bb32fc653e37f47 (patch) | |
tree | 26f40a7967832a622f1224aefca4bb16fbb9f056 /src/mainboard/google | |
parent | 1642e1315857654c6a58938c63cac484c76f34de (diff) | |
download | coreboot-4ed8b305539f661895d9fa950bb32fc653e37f47.tar.xz |
rockchip/rk3399: Adjust gpio_t format to match ARM TF
Our structure packing for Rockchip's gpio_t was chosen arbitrarily. ARM
Trusted Firmware has since become a thing and chosen a slightly
different way to represent GPIOs in a 32-bit word. Let's align our
format to them so we don't need to remember to convert the values every
time we pass them through.
CQ-DEPEND=CL:572228
Change-Id: I9ce33da28ee8a34d2d944bee010d8bfc06fe879b
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/20586
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google')
-rw-r--r-- | src/mainboard/google/gru/mainboard.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/src/mainboard/google/gru/mainboard.c b/src/mainboard/google/gru/mainboard.c index 099a3d9dcf..fa127edf82 100644 --- a/src/mainboard/google/gru/mainboard.c +++ b/src/mainboard/google/gru/mainboard.c @@ -99,7 +99,7 @@ static void register_gpio_suspend(void) .polarity = BL31_GPIO_LEVEL_LOW, }, }; - param_p15_en.gpio.index = GET_GPIO_NUM(GPIO_P15V_EN); + param_p15_en.gpio.index = GPIO_P15V_EN.raw; register_bl31_param(¶m_p15_en.h); static struct bl31_gpio_param param_p18_audio_en = { @@ -110,7 +110,7 @@ static void register_gpio_suspend(void) .polarity = BL31_GPIO_LEVEL_LOW, }, }; - param_p18_audio_en.gpio.index = GET_GPIO_NUM(GPIO_P18V_AUDIO_PWREN); + param_p18_audio_en.gpio.index = GPIO_P18V_AUDIO_PWREN.raw; register_bl31_param(¶m_p18_audio_en.h); static struct bl31_gpio_param param_p30_en = { @@ -121,7 +121,7 @@ static void register_gpio_suspend(void) .polarity = BL31_GPIO_LEVEL_LOW, }, }; - param_p30_en.gpio.index = GET_GPIO_NUM(GPIO_P30V_EN); + param_p30_en.gpio.index = GPIO_P30V_EN.raw; register_bl31_param(¶m_p30_en.h); } @@ -137,7 +137,7 @@ static void register_reset_to_bl31(void) }; /* gru/kevin reset pin: gpio0b3 */ - param_reset.gpio.index = GET_GPIO_NUM(GPIO_RESET), + param_reset.gpio.index = GPIO_RESET.raw, register_bl31_param(¶m_reset.h); } @@ -158,7 +158,7 @@ static void register_poweroff_to_bl31(void) * reuse with tsadc int pin, so iomux need set back to * gpio in BL31 and depthcharge before you setting this gpio */ - param_poweroff.gpio.index = GET_GPIO_NUM(GPIO_POWEROFF), + param_poweroff.gpio.index = GPIO_POWEROFF.raw, register_bl31_param(¶m_poweroff.h); } |