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| author | Yuchen Huang <yuchen.huang@mediatek.corp-partner.google.com> | 2021-04-11 15:28:20 +0800 |
|---|---|---|
| committer | Hung-Te Lin <hungte@chromium.org> | 2021-05-10 01:57:49 +0000 |
| commit | 6a6e58cb4197b96f8363a000a66ca54fc3344ddd (patch) | |
| tree | ca8f82cbf45a90becb4358331552d66c142349c2 /src/mainboard/google | |
| parent | 24c6355741e9f68fb2304be0dcdadfb25570b787 (diff) | |
| download | coreboot-6a6e58cb4197b96f8363a000a66ca54fc3344ddd.tar.xz | |
soc/mediatek/mt8195: Add clk_buf driver
Both mt8192 and mt8195 use mt6359p clk_buf.
But mt8195 clk_buf uses legacy co-clock mode without srclken_rc.
Signed-off-by: Yuchen Huang <yuchen.huang@mediatek.corp-partner.google.com>
Change-Id: Ie9ee91449a7a14e77231493f807b321b2dbaa6a6
Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/53896
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Diffstat (limited to 'src/mainboard/google')
| -rw-r--r-- | src/mainboard/google/cherry/romstage.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/google/cherry/romstage.c b/src/mainboard/google/cherry/romstage.c index cba599596c..f4bb1ca27b 100644 --- a/src/mainboard/google/cherry/romstage.c +++ b/src/mainboard/google/cherry/romstage.c @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <arch/stages.h> +#include <soc/clkbuf.h> #include <soc/mt6315.h> #include <soc/mt6359p.h> #include <soc/pmif.h> @@ -10,4 +11,5 @@ void platform_romstage_main(void) mtk_pmif_init(); mt6359p_init(); mt6315_init(); + clk_buf_init(); } |