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authorFurquan Shaikh <furquan@google.com>2019-04-01 22:24:29 -0700
committerFurquan Shaikh <furquan@google.com>2019-04-04 17:41:57 +0000
commitbac21f5b131a6f2d5b6fd5b7d7ac9455d40bc129 (patch)
treef780870606f99dc7c2b6ac26cbfd66cc7a4b5e1b /src/mainboard/google
parentb0fe89d31bf2b27c77d46c59b10db333328b260e (diff)
downloadcoreboot-bac21f5b131a6f2d5b6fd5b7d7ac9455d40bc129.tar.xz
mb/google/hatch: Move I2C/SPI options to override tree
This change moves the I2C/SPI devices and configs which do not apply to all variants to override tree. Currently, there are just two variants. However, as we prepare to add more variants, these devices need to be moved out of the base devicetree. BUG=b:129728235 TEST=Verified that I2C/SPI devices are present in static.c for hatch and hatch_whl. Change-Id: I9426f6bf5f8514de5f1889e22e57105749fd92de Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32138 Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Shelley Chen <shchen@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google')
-rw-r--r--src/mainboard/google/hatch/Kconfig2
-rw-r--r--src/mainboard/google/hatch/variants/baseboard/devicetree.cb141
-rw-r--r--src/mainboard/google/hatch/variants/hatch/overridetree.cb123
-rw-r--r--src/mainboard/google/hatch/variants/hatch_whl/overridetree.cb126
4 files changed, 257 insertions, 135 deletions
diff --git a/src/mainboard/google/hatch/Kconfig b/src/mainboard/google/hatch/Kconfig
index f57b41043f..041ac2d95e 100644
--- a/src/mainboard/google/hatch/Kconfig
+++ b/src/mainboard/google/hatch/Kconfig
@@ -85,7 +85,7 @@ config MAX_CPUS
config OVERRIDE_DEVICETREE
string
- default "variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" if !BOARD_GOOGLE_HATCH_WHL
+ default "variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
config TPM_TIS_ACPI_INTERRUPT
int
diff --git a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb
index 007f297c39..2f1120a584 100644
--- a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb
@@ -17,35 +17,6 @@ chip soc/intel/cannonlake
# EC memory map range is 0x900-0x9ff
register "gen3_dec" = "0x00fc0901"
- # Intel Common SoC Config
- #+-------------------+---------------------------+
- #| Field | Value |
- #+-------------------+---------------------------+
- #| GSPI0 | cr50 TPM. Early init is |
- #| | required to set up a BAR |
- #| | for TPM communication |
- #| | before memory is up |
- #| GSPI1 | FP MCU |
- #| I2C0 | Touchpad |
- #| I2C1 | Touch screen |
- #| I2C4 | Audio |
- #+-------------------+---------------------------+
- register "common_soc_config" = "{
- .gspi[0] = {
- .speed_mhz = 1,
- .early_init = 1,
- },
- .i2c[0] = {
- .speed = I2C_SPEED_FAST,
- },
- .i2c[1] = {
- .speed = I2C_SPEED_FAST,
- },
- .i2c[4] = {
- .speed = I2C_SPEED_FAST,
- },
- }"
-
# FSP configuration
register "InternalGfx" = "1"
register "SkipExtGfxScan" = "1"
@@ -214,87 +185,11 @@ chip soc/intel/cannonlake
register "wake" = "GPE0_PME_B0"
device pci 14.3 on end # CNVi wifi
end
- device pci 14.5 on end # SDCard
- device pci 15.0 on
- chip drivers/i2c/generic
- register "hid" = ""ELAN0000""
- register "desc" = ""ELAN Touchpad""
- register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_D21_IRQ)"
- register "wake" = "GPE0_DW0_21"
- device i2c 15 on end
- end
- end # I2C #0
- device pci 15.1 on
- chip drivers/i2c/generic
- register "hid" = ""ELAN0001""
- register "desc" = ""ELAN Touchscreen""
- register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_D16_IRQ)"
- register "probed" = "1"
- register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D15)"
- register "reset_delay_ms" = "100"
- register "reset_off_delay_ms" = "5"
- register "has_power_resource" = "1"
- register "stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C4)"
- register "stop_off_delay_ms" = "5"
- device i2c 49 on end
- end
- chip drivers/i2c/hid
- register "generic.hid" = ""GDIX0000""
- register "generic.desc" = ""Goodix Touchscreen""
- register "generic.irq" = "ACPI_IRQ_EDGE_LOW(GPP_D16_IRQ)"
- register "generic.probed" = "1"
- register "generic.reset_gpio" =
- "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D15)"
- register "generic.reset_delay_ms" = "30"
- register "generic.reset_off_delay_ms" = "3"
- register "generic.has_power_resource" = "1"
- register "hid_desc_reg_offset" = "0x01"
- device i2c 5d on end
- end
- end # I2C #1
- device pci 15.2 on
- chip drivers/generic/gpio_keys
- register "name" = ""PENH""
- register "gpio" = "ACPI_GPIO_INPUT_ACTIVE_HIGH(GPP_A8)"
- register "key.dev_name" = ""EJCT""
- register "key.linux_code" = "SW_PEN_INSERTED"
- register "key.linux_input_type" = "EV_SW"
- register "key.label" = ""pen_eject""
- device generic 0 on end
- end
- end # I2C #2
- device pci 15.3 on
- chip drivers/i2c/sx9310
- register "desc" = ""SAR Proximity Sensor""
- register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_A0_IRQ)"
- register "speed" = "I2C_SPEED_FAST"
- register "uid" = "1"
- register "reg_prox_ctrl0" = "0x10"
- register "reg_prox_ctrl1" = "0x00"
- register "reg_prox_ctrl2" = "0x84"
- register "reg_prox_ctrl3" = "0x0e"
- register "reg_prox_ctrl4" = "0x07"
- register "reg_prox_ctrl5" = "0xc6"
- register "reg_prox_ctrl6" = "0x20"
- register "reg_prox_ctrl7" = "0x0d"
- register "reg_prox_ctrl8" = "0x8d"
- register "reg_prox_ctrl9" = "0x43"
- register "reg_prox_ctrl10" = "0x1f"
- register "reg_prox_ctrl11" = "0x00"
- register "reg_prox_ctrl12" = "0x00"
- register "reg_prox_ctrl13" = "0x00"
- register "reg_prox_ctrl14" = "0x00"
- register "reg_prox_ctrl15" = "0x00"
- register "reg_prox_ctrl16" = "0x00"
- register "reg_prox_ctrl17" = "0x00"
- register "reg_prox_ctrl18" = "0x00"
- register "reg_prox_ctrl19" = "0x00"
- register "reg_sar_ctrl0" = "0x50"
- register "reg_sar_ctrl1" = "0x8a"
- register "reg_sar_ctrl2" = "0x3c"
- device i2c 28 on end
- end
- end # I2C #3
+ device pci 14.5 on end # SDCard
+ device pci 15.0 on end # I2C #0
+ device pci 15.1 on end # I2C #1
+ device pci 15.2 on end # I2C #2
+ device pci 15.3 on end # I2C #3
device pci 16.0 on end # Management Engine Interface 1
device pci 16.1 off end # Management Engine Interface 2
device pci 16.2 off end # Management Engine IDE-R
@@ -302,20 +197,7 @@ chip soc/intel/cannonlake
device pci 16.4 off end # Management Engine Interface 3
device pci 16.5 off end # Management Engine Interface 4
device pci 17.0 on end # SATA
- device pci 19.0 on
- chip drivers/i2c/generic
- register "hid" = ""10EC5682""
- register "name" = ""RT58""
- register "desc" = ""Realtek RT5682""
- register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_H0_IRQ)"
- register "property_count" = "1"
- # Set the jd_src to RT5668_JD1 for jack detection
- register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER"
- register "property_list[0].name" = ""realtek,jd-src""
- register "property_list[0].integer" = "1"
- device i2c 1a on end
- end
- end #I2C #4
+ device pci 19.0 on end #I2C #4
device pci 19.1 off end # I2C #5
device pci 19.2 off end # UART #2
device pci 1a.0 off end # eMMC
@@ -348,16 +230,7 @@ chip soc/intel/cannonlake
device spi 0 on end
end
end # GSPI #0
- device pci 1e.3 on
- chip drivers/spi/acpi
- register "name" = ""CRFP""
- register "hid" = "ACPI_DT_NAMESPACE_HID"
- register "uid" = "1"
- register "compat_string" = ""google,cros-ec-spi""
- register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_A23_IRQ)"
- device spi 1 on end
- end # FPMCU
- end # GSPI #1
+ device pci 1e.3 on end # GSPI #1
device pci 1f.0 on
chip ec/google/chromeec
device pnp 0c09.0 on end
diff --git a/src/mainboard/google/hatch/variants/hatch/overridetree.cb b/src/mainboard/google/hatch/variants/hatch/overridetree.cb
index 6e6414e8a8..28644d14cf 100644
--- a/src/mainboard/google/hatch/variants/hatch/overridetree.cb
+++ b/src/mainboard/google/hatch/variants/hatch/overridetree.cb
@@ -15,4 +15,127 @@ chip soc/intel/cannonlake
[PchSerialIoIndexUART2] = PchSerialIoDisabled,
}"
+ # Intel Common SoC Config
+ #+-------------------+---------------------------+
+ #| Field | Value |
+ #+-------------------+---------------------------+
+ #| GSPI0 | cr50 TPM. Early init is |
+ #| | required to set up a BAR |
+ #| | for TPM communication |
+ #| | before memory is up |
+ #| GSPI1 | FP MCU |
+ #| I2C0 | Touchpad |
+ #| I2C1 | Touch screen |
+ #| I2C4 | Audio |
+ #+-------------------+---------------------------+
+ register "common_soc_config" = "{
+ .gspi[0] = {
+ .speed_mhz = 1,
+ .early_init = 1,
+ },
+ .i2c[0] = {
+ .speed = I2C_SPEED_FAST,
+ },
+ .i2c[1] = {
+ .speed = I2C_SPEED_FAST,
+ },
+ .i2c[4] = {
+ .speed = I2C_SPEED_FAST,
+ },
+ }"
+
+ device domain 0 on
+ device pci 15.0 on
+ chip drivers/i2c/generic
+ register "hid" = ""ELAN0000""
+ register "desc" = ""ELAN Touchpad""
+ register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_D21_IRQ)"
+ register "wake" = "GPE0_DW0_21"
+ device i2c 15 on end
+ end
+ end # I2C #0
+ device pci 15.1 on
+ chip drivers/i2c/generic
+ register "hid" = ""ELAN0001""
+ register "desc" = ""ELAN Touchscreen""
+ register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_D16_IRQ)"
+ register "probed" = "1"
+ register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D15)"
+ register "reset_delay_ms" = "100"
+ register "reset_off_delay_ms" = "5"
+ register "has_power_resource" = "1"
+ register "stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C4)"
+ register "stop_off_delay_ms" = "5"
+ device i2c 49 on end
+ end
+ end # I2C #1
+ device pci 15.2 on
+ chip drivers/generic/gpio_keys
+ register "name" = ""PENH""
+ register "gpio" = "ACPI_GPIO_INPUT_ACTIVE_HIGH(GPP_A8)"
+ register "key.dev_name" = ""EJCT""
+ register "key.linux_code" = "SW_PEN_INSERTED"
+ register "key.linux_input_type" = "EV_SW"
+ register "key.label" = ""pen_eject""
+ device generic 0 on end
+ end
+ end # I2C #2
+ device pci 15.3 on
+ chip drivers/i2c/sx9310
+ register "desc" = ""SAR Proximity Sensor""
+ register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_A0_IRQ)"
+ register "speed" = "I2C_SPEED_FAST"
+ register "uid" = "1"
+ register "reg_prox_ctrl0" = "0x10"
+ register "reg_prox_ctrl1" = "0x00"
+ register "reg_prox_ctrl2" = "0x84"
+ register "reg_prox_ctrl3" = "0x0e"
+ register "reg_prox_ctrl4" = "0x07"
+ register "reg_prox_ctrl5" = "0xc6"
+ register "reg_prox_ctrl6" = "0x20"
+ register "reg_prox_ctrl7" = "0x0d"
+ register "reg_prox_ctrl8" = "0x8d"
+ register "reg_prox_ctrl9" = "0x43"
+ register "reg_prox_ctrl10" = "0x1f"
+ register "reg_prox_ctrl11" = "0x00"
+ register "reg_prox_ctrl12" = "0x00"
+ register "reg_prox_ctrl13" = "0x00"
+ register "reg_prox_ctrl14" = "0x00"
+ register "reg_prox_ctrl15" = "0x00"
+ register "reg_prox_ctrl16" = "0x00"
+ register "reg_prox_ctrl17" = "0x00"
+ register "reg_prox_ctrl18" = "0x00"
+ register "reg_prox_ctrl19" = "0x00"
+ register "reg_sar_ctrl0" = "0x50"
+ register "reg_sar_ctrl1" = "0x8a"
+ register "reg_sar_ctrl2" = "0x3c"
+ device i2c 28 on end
+ end
+ end # I2C #3
+ device pci 19.0 on
+ chip drivers/i2c/generic
+ register "hid" = ""10EC5682""
+ register "name" = ""RT58""
+ register "desc" = ""Realtek RT5682""
+ register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_H0_IRQ)"
+ register "property_count" = "1"
+ # Set the jd_src to RT5668_JD1 for jack detection
+ register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER"
+ register "property_list[0].name" = ""realtek,jd-src""
+ register "property_list[0].integer" = "1"
+ device i2c 1a on end
+ end
+ end #I2C #4
+ device pci 1e.3 on
+ chip drivers/spi/acpi
+ register "name" = ""CRFP""
+ register "hid" = "ACPI_DT_NAMESPACE_HID"
+ register "uid" = "1"
+ register "compat_string" = ""google,cros-ec-spi""
+ register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_A23_IRQ)"
+ device spi 1 on end
+ end # FPMCU
+ end # GSPI #1
+ end
+
end
diff --git a/src/mainboard/google/hatch/variants/hatch_whl/overridetree.cb b/src/mainboard/google/hatch/variants/hatch_whl/overridetree.cb
new file mode 100644
index 0000000000..9b772c2cd7
--- /dev/null
+++ b/src/mainboard/google/hatch/variants/hatch_whl/overridetree.cb
@@ -0,0 +1,126 @@
+chip soc/intel/cannonlake
+
+ # Intel Common SoC Config
+ #+-------------------+---------------------------+
+ #| Field | Value |
+ #+-------------------+---------------------------+
+ #| GSPI0 | cr50 TPM. Early init is |
+ #| | required to set up a BAR |
+ #| | for TPM communication |
+ #| | before memory is up |
+ #| GSPI1 | FP MCU |
+ #| I2C0 | Touchpad |
+ #| I2C1 | Touch screen |
+ #| I2C4 | Audio |
+ #+-------------------+---------------------------+
+ register "common_soc_config" = "{
+ .gspi[0] = {
+ .speed_mhz = 1,
+ .early_init = 1,
+ },
+ .i2c[0] = {
+ .speed = I2C_SPEED_FAST,
+ },
+ .i2c[1] = {
+ .speed = I2C_SPEED_FAST,
+ },
+ .i2c[4] = {
+ .speed = I2C_SPEED_FAST,
+ },
+ }"
+
+ device domain 0 on
+ device pci 15.0 on
+ chip drivers/i2c/generic
+ register "hid" = ""ELAN0000""
+ register "desc" = ""ELAN Touchpad""
+ register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_D21_IRQ)"
+ register "wake" = "GPE0_DW0_21"
+ device i2c 15 on end
+ end
+ end # I2C #0
+ device pci 15.1 on
+ chip drivers/i2c/generic
+ register "hid" = ""ELAN0001""
+ register "desc" = ""ELAN Touchscreen""
+ register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_D16_IRQ)"
+ register "probed" = "1"
+ register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D15)"
+ register "reset_delay_ms" = "100"
+ register "reset_off_delay_ms" = "5"
+ register "has_power_resource" = "1"
+ register "stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C4)"
+ register "stop_off_delay_ms" = "5"
+ device i2c 49 on end
+ end
+ end # I2C #1
+ device pci 15.2 on
+ chip drivers/generic/gpio_keys
+ register "name" = ""PENH""
+ register "gpio" = "ACPI_GPIO_INPUT_ACTIVE_HIGH(GPP_A8)"
+ register "key.dev_name" = ""EJCT""
+ register "key.linux_code" = "SW_PEN_INSERTED"
+ register "key.linux_input_type" = "EV_SW"
+ register "key.label" = ""pen_eject""
+ device generic 0 on end
+ end
+ end # I2C #2
+ device pci 15.3 on
+ chip drivers/i2c/sx9310
+ register "desc" = ""SAR Proximity Sensor""
+ register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_A0_IRQ)"
+ register "speed" = "I2C_SPEED_FAST"
+ register "uid" = "1"
+ register "reg_prox_ctrl0" = "0x10"
+ register "reg_prox_ctrl1" = "0x00"
+ register "reg_prox_ctrl2" = "0x84"
+ register "reg_prox_ctrl3" = "0x0e"
+ register "reg_prox_ctrl4" = "0x07"
+ register "reg_prox_ctrl5" = "0xc6"
+ register "reg_prox_ctrl6" = "0x20"
+ register "reg_prox_ctrl7" = "0x0d"
+ register "reg_prox_ctrl8" = "0x8d"
+ register "reg_prox_ctrl9" = "0x43"
+ register "reg_prox_ctrl10" = "0x1f"
+ register "reg_prox_ctrl11" = "0x00"
+ register "reg_prox_ctrl12" = "0x00"
+ register "reg_prox_ctrl13" = "0x00"
+ register "reg_prox_ctrl14" = "0x00"
+ register "reg_prox_ctrl15" = "0x00"
+ register "reg_prox_ctrl16" = "0x00"
+ register "reg_prox_ctrl17" = "0x00"
+ register "reg_prox_ctrl18" = "0x00"
+ register "reg_prox_ctrl19" = "0x00"
+ register "reg_sar_ctrl0" = "0x50"
+ register "reg_sar_ctrl1" = "0x8a"
+ register "reg_sar_ctrl2" = "0x3c"
+ device i2c 28 on end
+ end
+ end # I2C #3
+ device pci 19.0 on
+ chip drivers/i2c/generic
+ register "hid" = ""10EC5682""
+ register "name" = ""RT58""
+ register "desc" = ""Realtek RT5682""
+ register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_H0_IRQ)"
+ register "property_count" = "1"
+ # Set the jd_src to RT5668_JD1 for jack detection
+ register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER"
+ register "property_list[0].name" = ""realtek,jd-src""
+ register "property_list[0].integer" = "1"
+ device i2c 1a on end
+ end
+ end #I2C #4
+ device pci 1e.3 on
+ chip drivers/spi/acpi
+ register "name" = ""CRFP""
+ register "hid" = "ACPI_DT_NAMESPACE_HID"
+ register "uid" = "1"
+ register "compat_string" = ""google,cros-ec-spi""
+ register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_A23_IRQ)"
+ device spi 1 on end
+ end # FPMCU
+ end # GSPI #1
+ end
+
+end