mb/**/cmos.layout: Indent everything with tabs

Time has shown that using spaces never converges into proper alignment.

Change-Id: I5338aeaf139580f9eab3e1e02cb910080a95d2c2
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47147
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>

11 files changed, 378 insertions, 378 deletions

diff --git a/src/mainboard/google/auron/cmos.layout b/src/mainboard/google/auron/cmos.layout
index 3b2b829209..283aa1ea35 100644
--- a/src/mainboard/google/auron/cmos.layout
+++ b/src/mainboard/google/auron/cmos.layout
@@ -4,58 +4,58 @@
 entries
 
 # -----------------------------------------------------------------
-0          120       r       0        reserved_memory
+0	120	r	0	reserved_memory
 
 # -----------------------------------------------------------------
 # RTC_BOOT_BYTE (coreboot hardcoded)
-384          1       e       4        boot_option
-388          4       h       0        reboot_counter
+384	1	e	4	boot_option
+388	4	h	0	reboot_counter
 
 # -----------------------------------------------------------------
 # coreboot config options: console
-395          4       e       6        debug_level
+395	4	e	6	debug_level
 
 # coreboot config options: cpu
-400          1       e       2        hyper_threading
+400	1	e	2	hyper_threading
 
 # coreboot config options: southbridge
-408          1       e       1        nmi
-409          2       e       7        power_on_after_fail
+408	1	e	1	nmi
+409	2	e	7	power_on_after_fail
 
 # coreboot config options: bootloader
 #Used by ChromeOS:
-416        128       r        0        vbnv
+416	128	r	0	vbnv
 
 # SandyBridge MRC Scrambler Seed values
-896         32        r       0        mrc_scrambler_seed
-928         32        r       0        mrc_scrambler_seed_s3
+896	32	r	0	mrc_scrambler_seed
+928	32	r	0	mrc_scrambler_seed_s3
 
 # coreboot config options: check sums
-984         16       h       0        check_sum
+984	16	h	0	check_sum
 
 # -----------------------------------------------------------------
 
 enumerations
 
-#ID value   text
-1     0     Disable
-1     1     Enable
-2     0     Enable
-2     1     Disable
-4     0     Fallback
-4     1     Normal
-6     0     Emergency
-6     1     Alert
-6     2     Critical
-6     3     Error
-6     4     Warning
-6     5     Notice
-6     6     Info
-6     7     Debug
-6     8     Spew
-7     0     Disable
-7     1     Enable
-7     2     Keep
+#ID	value	text
+1	0	Disable
+1	1	Enable
+2	0	Enable
+2	1	Disable
+4	0	Fallback
+4	1	Normal
+6	0	Emergency
+6	1	Alert
+6	2	Critical
+6	3	Error
+6	4	Warning
+6	5	Notice
+6	6	Info
+6	7	Debug
+6	8	Spew
+7	0	Disable
+7	1	Enable
+7	2	Keep
 # -----------------------------------------------------------------
 checksums
 
diff --git a/src/mainboard/google/beltino/cmos.layout b/src/mainboard/google/beltino/cmos.layout
index 3b2b829209..283aa1ea35 100644
--- a/src/mainboard/google/beltino/cmos.layout
+++ b/src/mainboard/google/beltino/cmos.layout
@@ -4,58 +4,58 @@
 entries
 
 # -----------------------------------------------------------------
-0          120       r       0        reserved_memory
+0	120	r	0	reserved_memory
 
 # -----------------------------------------------------------------
 # RTC_BOOT_BYTE (coreboot hardcoded)
-384          1       e       4        boot_option
-388          4       h       0        reboot_counter
+384	1	e	4	boot_option
+388	4	h	0	reboot_counter
 
 # -----------------------------------------------------------------
 # coreboot config options: console
-395          4       e       6        debug_level
+395	4	e	6	debug_level
 
 # coreboot config options: cpu
-400          1       e       2        hyper_threading
+400	1	e	2	hyper_threading
 
 # coreboot config options: southbridge
-408          1       e       1        nmi
-409          2       e       7        power_on_after_fail
+408	1	e	1	nmi
+409	2	e	7	power_on_after_fail
 
 # coreboot config options: bootloader
 #Used by ChromeOS:
-416        128       r        0        vbnv
+416	128	r	0	vbnv
 
 # SandyBridge MRC Scrambler Seed values
-896         32        r       0        mrc_scrambler_seed
-928         32        r       0        mrc_scrambler_seed_s3
+896	32	r	0	mrc_scrambler_seed
+928	32	r	0	mrc_scrambler_seed_s3
 
 # coreboot config options: check sums
-984         16       h       0        check_sum
+984	16	h	0	check_sum
 
 # -----------------------------------------------------------------
 
 enumerations
 
-#ID value   text
-1     0     Disable
-1     1     Enable
-2     0     Enable
-2     1     Disable
-4     0     Fallback
-4     1     Normal
-6     0     Emergency
-6     1     Alert
-6     2     Critical
-6     3     Error
-6     4     Warning
-6     5     Notice
-6     6     Info
-6     7     Debug
-6     8     Spew
-7     0     Disable
-7     1     Enable
-7     2     Keep
+#ID	value	text
+1	0	Disable
+1	1	Enable
+2	0	Enable
+2	1	Disable
+4	0	Fallback
+4	1	Normal
+6	0	Emergency
+6	1	Alert
+6	2	Critical
+6	3	Error
+6	4	Warning
+6	5	Notice
+6	6	Info
+6	7	Debug
+6	8	Spew
+7	0	Disable
+7	1	Enable
+7	2	Keep
 # -----------------------------------------------------------------
 checksums
 
diff --git a/src/mainboard/google/butterfly/cmos.layout b/src/mainboard/google/butterfly/cmos.layout
index 9bd6d1b7f6..057f6a5a9e 100644
--- a/src/mainboard/google/butterfly/cmos.layout
+++ b/src/mainboard/google/butterfly/cmos.layout
@@ -4,74 +4,74 @@
 entries
 
 # -----------------------------------------------------------------
-0          120       r       0        reserved_memory
+0	120	r	0	reserved_memory
 
 # -----------------------------------------------------------------
 # RTC_BOOT_BYTE (coreboot hardcoded)
-384          1       e       4        boot_option
-388          4       h       0        reboot_counter
+384	1	e	4	boot_option
+388	4	h	0	reboot_counter
 
 # -----------------------------------------------------------------
 # coreboot config options: console
 # No serial port on this motherboard
-395          4       e       6        debug_level
+395	4	e	6	debug_level
 
 # coreboot config options: cpu
 # hyper_threading not supported by the Celeron 847 on this board
-#400          1       e       2        hyper_threading
+#400	1	e	2	hyper_threading
 
 # coreboot config options: southbridge
-408          1       e       1        nmi
-409          2       e       7        power_on_after_fail
-411          1       e       8        sata_mode
+408	1	e	1	nmi
+409	2	e	7	power_on_after_fail
+411	1	e	8	sata_mode
 
 # coreboot config options: bootloader
 #Used by ChromeOS:
-416        128       r        0        vbnv
+416	128	r	0	vbnv
 
 # coreboot config options: northbridge
-544         3        e      11        gfx_uma_size
+544	3	e	11	gfx_uma_size
 
 # SandyBridge MRC Scrambler Seed values
-896         32        r       0        mrc_scrambler_seed
-928         32        r       0        mrc_scrambler_seed_s3
-960         16        r       0        mrc_scrambler_seed_chk
+896	32	r	0	mrc_scrambler_seed
+928	32	r	0	mrc_scrambler_seed_s3
+960	16	r	0	mrc_scrambler_seed_chk
 
 # coreboot config options: check sums
-984         16       h       0        check_sum
+984	16	h	0	check_sum
 
 # -----------------------------------------------------------------
 
 enumerations
 
-#ID value   text
-1     0     Disable
-1     1     Enable
-2     0     Enable
-2     1     Disable
-4     0     Fallback
-4     1     Normal
-6     0     Emergency
-6     1     Alert
-6     2     Critical
-6     3     Error
-6     4     Warning
-6     5     Notice
-6     6     Info
-6     7     Debug
-6     8     Spew
-7     0     Disable
-7     1     Enable
-7     2     Keep
-8     0     AHCI
-8     1     Compatible
-11    0     32M
-11    1     64M
-11    2     96M
-11    3     128M
-11    4     160M
-11    5     192M
-11    6     224M
+#ID	value	text
+1	0	Disable
+1	1	Enable
+2	0	Enable
+2	1	Disable
+4	0	Fallback
+4	1	Normal
+6	0	Emergency
+6	1	Alert
+6	2	Critical
+6	3	Error
+6	4	Warning
+6	5	Notice
+6	6	Info
+6	7	Debug
+6	8	Spew
+7	0	Disable
+7	1	Enable
+7	2	Keep
+8	0	AHCI
+8	1	Compatible
+11	0	32M
+11	1	64M
+11	2	96M
+11	3	128M
+11	4	160M
+11	5	192M
+11	6	224M
 # -----------------------------------------------------------------
 checksums
 
diff --git a/src/mainboard/google/cyan/cmos.layout b/src/mainboard/google/cyan/cmos.layout
index c66bb07802..929f7aaf9b 100644
--- a/src/mainboard/google/cyan/cmos.layout
+++ b/src/mainboard/google/cyan/cmos.layout
@@ -3,61 +3,61 @@
 # -----------------------------------------------------------------
 entries
 
-#start-bit length  config config-ID    name
+#start-bit length  config config-ID	name
 
 # -----------------------------------------------------------------
-0          120       r       0        reserved_memory
+0	120	r	0	reserved_memory
 
 # -----------------------------------------------------------------
 # RTC_BOOT_BYTE (coreboot hardcoded)
-384          1       e       4        boot_option
-388          4       h       0        reboot_counter
+384	1	e	4	boot_option
+388	4	h	0	reboot_counter
 
 # -----------------------------------------------------------------
 # coreboot config options: console
-395          4       e       6        debug_level
+395	4	e	6	debug_level
 
 # coreboot config options: cpu
-400          1       e       2        hyper_threading
+400	1	e	2	hyper_threading
 
 # coreboot config options: southbridge
-408          1       e       1        nmi
-409          2       e       7        power_on_after_fail
+408	1	e	1	nmi
+409	2	e	7	power_on_after_fail
 
 # coreboot config options: bootloader
 #Used by ChromeOS:
-416        128       r        0        vbnv
+416	128	r	0	vbnv
 
 # SandyBridge MRC Scrambler Seed values
-896         32        r       0        mrc_scrambler_seed
-928         32        r       0        mrc_scrambler_seed_s3
+896	32	r	0	mrc_scrambler_seed
+928	32	r	0	mrc_scrambler_seed_s3
 
 # coreboot config options: check sums
-984         16       h       0        check_sum
+984	16	h	0	check_sum
 
 # -----------------------------------------------------------------
 
 enumerations
 
-#ID value   text
-1     0     Disable
-1     1     Enable
-2     0     Enable
-2     1     Disable
-4     0     Fallback
-4     1     Normal
-6     0     Emergency
-6     1     Alert
-6     2     Critical
-6     3     Error
-6     4     Warning
-6     5     Notice
-6     6     Info
-6     7     Debug
-6     8     Spew
-7     0     Disable
-7     1     Enable
-7     2     Keep
+#ID	value	text
+1	0	Disable
+1	1	Enable
+2	0	Enable
+2	1	Disable
+4	0	Fallback
+4	1	Normal
+6	0	Emergency
+6	1	Alert
+6	2	Critical
+6	3	Error
+6	4	Warning
+6	5	Notice
+6	6	Info
+6	7	Debug
+6	8	Spew
+7	0	Disable
+7	1	Enable
+7	2	Keep
 # -----------------------------------------------------------------
 checksums
 
diff --git a/src/mainboard/google/glados/cmos.layout b/src/mainboard/google/glados/cmos.layout
index c66bb07802..929f7aaf9b 100644
--- a/src/mainboard/google/glados/cmos.layout
+++ b/src/mainboard/google/glados/cmos.layout
@@ -3,61 +3,61 @@
 # -----------------------------------------------------------------
 entries
 
-#start-bit length  config config-ID    name
+#start-bit length  config config-ID	name
 
 # -----------------------------------------------------------------
-0          120       r       0        reserved_memory
+0	120	r	0	reserved_memory
 
 # -----------------------------------------------------------------
 # RTC_BOOT_BYTE (coreboot hardcoded)
-384          1       e       4        boot_option
-388          4       h       0        reboot_counter
+384	1	e	4	boot_option
+388	4	h	0	reboot_counter
 
 # -----------------------------------------------------------------
 # coreboot config options: console
-395          4       e       6        debug_level
+395	4	e	6	debug_level
 
 # coreboot config options: cpu
-400          1       e       2        hyper_threading
+400	1	e	2	hyper_threading
 
 # coreboot config options: southbridge
-408          1       e       1        nmi
-409          2       e       7        power_on_after_fail
+408	1	e	1	nmi
+409	2	e	7	power_on_after_fail
 
 # coreboot config options: bootloader
 #Used by ChromeOS:
-416        128       r        0        vbnv
+416	128	r	0	vbnv
 
 # SandyBridge MRC Scrambler Seed values
-896         32        r       0        mrc_scrambler_seed
-928         32        r       0        mrc_scrambler_seed_s3
+896	32	r	0	mrc_scrambler_seed
+928	32	r	0	mrc_scrambler_seed_s3
 
 # coreboot config options: check sums
-984         16       h       0        check_sum
+984	16	h	0	check_sum
 
 # -----------------------------------------------------------------
 
 enumerations
 
-#ID value   text
-1     0     Disable
-1     1     Enable
-2     0     Enable
-2     1     Disable
-4     0     Fallback
-4     1     Normal
-6     0     Emergency
-6     1     Alert
-6     2     Critical
-6     3     Error
-6     4     Warning
-6     5     Notice
-6     6     Info
-6     7     Debug
-6     8     Spew
-7     0     Disable
-7     1     Enable
-7     2     Keep
+#ID	value	text
+1	0	Disable
+1	1	Enable
+2	0	Enable
+2	1	Disable
+4	0	Fallback
+4	1	Normal
+6	0	Emergency
+6	1	Alert
+6	2	Critical
+6	3	Error
+6	4	Warning
+6	5	Notice
+6	6	Info
+6	7	Debug
+6	8	Spew
+7	0	Disable
+7	1	Enable
+7	2	Keep
 # -----------------------------------------------------------------
 checksums
 
diff --git a/src/mainboard/google/jecht/cmos.layout b/src/mainboard/google/jecht/cmos.layout
index c66bb07802..929f7aaf9b 100644
--- a/src/mainboard/google/jecht/cmos.layout
+++ b/src/mainboard/google/jecht/cmos.layout
@@ -3,61 +3,61 @@
 # -----------------------------------------------------------------
 entries
 
-#start-bit length  config config-ID    name
+#start-bit length  config config-ID	name
 
 # -----------------------------------------------------------------
-0          120       r       0        reserved_memory
+0	120	r	0	reserved_memory
 
 # -----------------------------------------------------------------
 # RTC_BOOT_BYTE (coreboot hardcoded)
-384          1       e       4        boot_option
-388          4       h       0        reboot_counter
+384	1	e	4	boot_option
+388	4	h	0	reboot_counter
 
 # -----------------------------------------------------------------
 # coreboot config options: console
-395          4       e       6        debug_level
+395	4	e	6	debug_level
 
 # coreboot config options: cpu
-400          1       e       2        hyper_threading
+400	1	e	2	hyper_threading
 
 # coreboot config options: southbridge
-408          1       e       1        nmi
-409          2       e       7        power_on_after_fail
+408	1	e	1	nmi
+409	2	e	7	power_on_after_fail
 
 # coreboot config options: bootloader
 #Used by ChromeOS:
-416        128       r        0        vbnv
+416	128	r	0	vbnv
 
 # SandyBridge MRC Scrambler Seed values
-896         32        r       0        mrc_scrambler_seed
-928         32        r       0        mrc_scrambler_seed_s3
+896	32	r	0	mrc_scrambler_seed
+928	32	r	0	mrc_scrambler_seed_s3
 
 # coreboot config options: check sums
-984         16       h       0        check_sum
+984	16	h	0	check_sum
 
 # -----------------------------------------------------------------
 
 enumerations
 
-#ID value   text
-1     0     Disable
-1     1     Enable
-2     0     Enable
-2     1     Disable
-4     0     Fallback
-4     1     Normal
-6     0     Emergency
-6     1     Alert
-6     2     Critical
-6     3     Error
-6     4     Warning
-6     5     Notice
-6     6     Info
-6     7     Debug
-6     8     Spew
-7     0     Disable
-7     1     Enable
-7     2     Keep
+#ID	value	text
+1	0	Disable
+1	1	Enable
+2	0	Enable
+2	1	Disable
+4	0	Fallback
+4	1	Normal
+6	0	Emergency
+6	1	Alert
+6	2	Critical
+6	3	Error
+6	4	Warning
+6	5	Notice
+6	6	Info
+6	7	Debug
+6	8	Spew
+7	0	Disable
+7	1	Enable
+7	2	Keep
 # -----------------------------------------------------------------
 checksums
 
diff --git a/src/mainboard/google/link/cmos.layout b/src/mainboard/google/link/cmos.layout
index eecfdfaf4b..5cfca4f15f 100644
--- a/src/mainboard/google/link/cmos.layout
+++ b/src/mainboard/google/link/cmos.layout
@@ -4,71 +4,71 @@
 entries
 
 # -----------------------------------------------------------------
-0          120       r       0        reserved_memory
+0	120	r	0	reserved_memory
 
 # -----------------------------------------------------------------
 # RTC_BOOT_BYTE (coreboot hardcoded)
-384          1       e       4        boot_option
-388          4       h       0        reboot_counter
+384	1	e	4	boot_option
+388	4	h	0	reboot_counter
 
 # -----------------------------------------------------------------
 # coreboot config options: console
-395          4       e       6        debug_level
+395	4	e	6	debug_level
 
 # coreboot config options: cpu
-400          1       e       2        hyper_threading
+400	1	e	2	hyper_threading
 
 # coreboot config options: southbridge
-408          1       e       1        nmi
-409          2       e       7        power_on_after_fail
-411          1       e       8        sata_mode
+408	1	e	1	nmi
+409	2	e	7	power_on_after_fail
+411	1	e	8	sata_mode
 
 # coreboot config options: bootloader
 #Used by ChromeOS:
-416        128       r        0        vbnv
+416	128	r	0	vbnv
 
 # coreboot config options: northbridge
-544         3        e      11        gfx_uma_size
+544	3	e	11	gfx_uma_size
 
 # SandyBridge MRC Scrambler Seed values
-896         32        r       0        mrc_scrambler_seed
-928         32        r       0        mrc_scrambler_seed_s3
+896	32	r	0	mrc_scrambler_seed
+928	32	r	0	mrc_scrambler_seed_s3
 
 # coreboot config options: check sums
-984         16       h       0        check_sum
+984	16	h	0	check_sum
 
 # -----------------------------------------------------------------
 
 enumerations
 
-#ID value   text
-1     0     Disable
-1     1     Enable
-2     0     Enable
-2     1     Disable
-4     0     Fallback
-4     1     Normal
-6     0     Emergency
-6     1     Alert
-6     2     Critical
-6     3     Error
-6     4     Warning
-6     5     Notice
-6     6     Info
-6     7     Debug
-6     8     Spew
-7     0     Disable
-7     1     Enable
-7     2     Keep
-8     0     AHCI
-8     1     Compatible
-11    0     32M
-11    1     64M
-11    2     96M
-11    3     128M
-11    4     160M
-11    5     192M
-11    6     224M
+#ID	value	text
+1	0	Disable
+1	1	Enable
+2	0	Enable
+2	1	Disable
+4	0	Fallback
+4	1	Normal
+6	0	Emergency
+6	1	Alert
+6	2	Critical
+6	3	Error
+6	4	Warning
+6	5	Notice
+6	6	Info
+6	7	Debug
+6	8	Spew
+7	0	Disable
+7	1	Enable
+7	2	Keep
+8	0	AHCI
+8	1	Compatible
+11	0	32M
+11	1	64M
+11	2	96M
+11	3	128M
+11	4	160M
+11	5	192M
+11	6	224M
 # -----------------------------------------------------------------
 checksums
 
diff --git a/src/mainboard/google/parrot/cmos.layout b/src/mainboard/google/parrot/cmos.layout
index eecfdfaf4b..5cfca4f15f 100644
--- a/src/mainboard/google/parrot/cmos.layout
+++ b/src/mainboard/google/parrot/cmos.layout
@@ -4,71 +4,71 @@
 entries
 
 # -----------------------------------------------------------------
-0          120       r       0        reserved_memory
+0	120	r	0	reserved_memory
 
 # -----------------------------------------------------------------
 # RTC_BOOT_BYTE (coreboot hardcoded)
-384          1       e       4        boot_option
-388          4       h       0        reboot_counter
+384	1	e	4	boot_option
+388	4	h	0	reboot_counter
 
 # -----------------------------------------------------------------
 # coreboot config options: console
-395          4       e       6        debug_level
+395	4	e	6	debug_level
 
 # coreboot config options: cpu
-400          1       e       2        hyper_threading
+400	1	e	2	hyper_threading
 
 # coreboot config options: southbridge
-408          1       e       1        nmi
-409          2       e       7        power_on_after_fail
-411          1       e       8        sata_mode
+408	1	e	1	nmi
+409	2	e	7	power_on_after_fail
+411	1	e	8	sata_mode
 
 # coreboot config options: bootloader
 #Used by ChromeOS:
-416        128       r        0        vbnv
+416	128	r	0	vbnv
 
 # coreboot config options: northbridge
-544         3        e      11        gfx_uma_size
+544	3	e	11	gfx_uma_size
 
 # SandyBridge MRC Scrambler Seed values
-896         32        r       0        mrc_scrambler_seed
-928         32        r       0        mrc_scrambler_seed_s3
+896	32	r	0	mrc_scrambler_seed
+928	32	r	0	mrc_scrambler_seed_s3
 
 # coreboot config options: check sums
-984         16       h       0        check_sum
+984	16	h	0	check_sum
 
 # -----------------------------------------------------------------
 
 enumerations
 
-#ID value   text
-1     0     Disable
-1     1     Enable
-2     0     Enable
-2     1     Disable
-4     0     Fallback
-4     1     Normal
-6     0     Emergency
-6     1     Alert
-6     2     Critical
-6     3     Error
-6     4     Warning
-6     5     Notice
-6     6     Info
-6     7     Debug
-6     8     Spew
-7     0     Disable
-7     1     Enable
-7     2     Keep
-8     0     AHCI
-8     1     Compatible
-11    0     32M
-11    1     64M
-11    2     96M
-11    3     128M
-11    4     160M
-11    5     192M
-11    6     224M
+#ID	value	text
+1	0	Disable
+1	1	Enable
+2	0	Enable
+2	1	Disable
+4	0	Fallback
+4	1	Normal
+6	0	Emergency
+6	1	Alert
+6	2	Critical
+6	3	Error
+6	4	Warning
+6	5	Notice
+6	6	Info
+6	7	Debug
+6	8	Spew
+7	0	Disable
+7	1	Enable
+7	2	Keep
+8	0	AHCI
+8	1	Compatible
+11	0	32M
+11	1	64M
+11	2	96M
+11	3	128M
+11	4	160M
+11	5	192M
+11	6	224M
 # -----------------------------------------------------------------
 checksums
 
diff --git a/src/mainboard/google/rambi/cmos.layout b/src/mainboard/google/rambi/cmos.layout
index 3b2b829209..283aa1ea35 100644
--- a/src/mainboard/google/rambi/cmos.layout
+++ b/src/mainboard/google/rambi/cmos.layout
@@ -4,58 +4,58 @@
 entries
 
 # -----------------------------------------------------------------
-0          120       r       0        reserved_memory
+0	120	r	0	reserved_memory
 
 # -----------------------------------------------------------------
 # RTC_BOOT_BYTE (coreboot hardcoded)
-384          1       e       4        boot_option
-388          4       h       0        reboot_counter
+384	1	e	4	boot_option
+388	4	h	0	reboot_counter
 
 # -----------------------------------------------------------------
 # coreboot config options: console
-395          4       e       6        debug_level
+395	4	e	6	debug_level
 
 # coreboot config options: cpu
-400          1       e       2        hyper_threading
+400	1	e	2	hyper_threading
 
 # coreboot config options: southbridge
-408          1       e       1        nmi
-409          2       e       7        power_on_after_fail
+408	1	e	1	nmi
+409	2	e	7	power_on_after_fail
 
 # coreboot config options: bootloader
 #Used by ChromeOS:
-416        128       r        0        vbnv
+416	128	r	0	vbnv
 
 # SandyBridge MRC Scrambler Seed values
-896         32        r       0        mrc_scrambler_seed
-928         32        r       0        mrc_scrambler_seed_s3
+896	32	r	0	mrc_scrambler_seed
+928	32	r	0	mrc_scrambler_seed_s3
 
 # coreboot config options: check sums
-984         16       h       0        check_sum
+984	16	h	0	check_sum
 
 # -----------------------------------------------------------------
 
 enumerations
 
-#ID value   text
-1     0     Disable
-1     1     Enable
-2     0     Enable
-2     1     Disable
-4     0     Fallback
-4     1     Normal
-6     0     Emergency
-6     1     Alert
-6     2     Critical
-6     3     Error
-6     4     Warning
-6     5     Notice
-6     6     Info
-6     7     Debug
-6     8     Spew
-7     0     Disable
-7     1     Enable
-7     2     Keep
+#ID	value	text
+1	0	Disable
+1	1	Enable
+2	0	Enable
+2	1	Disable
+4	0	Fallback
+4	1	Normal
+6	0	Emergency
+6	1	Alert
+6	2	Critical
+6	3	Error
+6	4	Warning
+6	5	Notice
+6	6	Info
+6	7	Debug
+6	8	Spew
+7	0	Disable
+7	1	Enable
+7	2	Keep
 # -----------------------------------------------------------------
 checksums
 
diff --git a/src/mainboard/google/slippy/cmos.layout b/src/mainboard/google/slippy/cmos.layout
index 3b2b829209..283aa1ea35 100644
--- a/src/mainboard/google/slippy/cmos.layout
+++ b/src/mainboard/google/slippy/cmos.layout
@@ -4,58 +4,58 @@
 entries
 
 # -----------------------------------------------------------------
-0          120       r       0        reserved_memory
+0	120	r	0	reserved_memory
 
 # -----------------------------------------------------------------
 # RTC_BOOT_BYTE (coreboot hardcoded)
-384          1       e       4        boot_option
-388          4       h       0        reboot_counter
+384	1	e	4	boot_option
+388	4	h	0	reboot_counter
 
 # -----------------------------------------------------------------
 # coreboot config options: console
-395          4       e       6        debug_level
+395	4	e	6	debug_level
 
 # coreboot config options: cpu
-400          1       e       2        hyper_threading
+400	1	e	2	hyper_threading
 
 # coreboot config options: southbridge
-408          1       e       1        nmi
-409          2       e       7        power_on_after_fail
+408	1	e	1	nmi
+409	2	e	7	power_on_after_fail
 
 # coreboot config options: bootloader
 #Used by ChromeOS:
-416        128       r        0        vbnv
+416	128	r	0	vbnv
 
 # SandyBridge MRC Scrambler Seed values
-896         32        r       0        mrc_scrambler_seed
-928         32        r       0        mrc_scrambler_seed_s3
+896	32	r	0	mrc_scrambler_seed
+928	32	r	0	mrc_scrambler_seed_s3
 
 # coreboot config options: check sums
-984         16       h       0        check_sum
+984	16	h	0	check_sum
 
 # -----------------------------------------------------------------
 
 enumerations
 
-#ID value   text
-1     0     Disable
-1     1     Enable
-2     0     Enable
-2     1     Disable
-4     0     Fallback
-4     1     Normal
-6     0     Emergency
-6     1     Alert
-6     2     Critical
-6     3     Error
-6     4     Warning
-6     5     Notice
-6     6     Info
-6     7     Debug
-6     8     Spew
-7     0     Disable
-7     1     Enable
-7     2     Keep
+#ID	value	text
+1	0	Disable
+1	1	Enable
+2	0	Enable
+2	1	Disable
+4	0	Fallback
+4	1	Normal
+6	0	Emergency
+6	1	Alert
+6	2	Critical
+6	3	Error
+6	4	Warning
+6	5	Notice
+6	6	Info
+6	7	Debug
+6	8	Spew
+7	0	Disable
+7	1	Enable
+7	2	Keep
 # -----------------------------------------------------------------
 checksums
 
diff --git a/src/mainboard/google/stout/cmos.layout b/src/mainboard/google/stout/cmos.layout
index eecfdfaf4b..5cfca4f15f 100644
--- a/src/mainboard/google/stout/cmos.layout
+++ b/src/mainboard/google/stout/cmos.layout
@@ -4,71 +4,71 @@
 entries
 
 # -----------------------------------------------------------------
-0          120       r       0        reserved_memory
+0	120	r	0	reserved_memory
 
 # -----------------------------------------------------------------
 # RTC_BOOT_BYTE (coreboot hardcoded)
-384          1       e       4        boot_option
-388          4       h       0        reboot_counter
+384	1	e	4	boot_option
+388	4	h	0	reboot_counter
 
 # -----------------------------------------------------------------
 # coreboot config options: console
-395          4       e       6        debug_level
+395	4	e	6	debug_level
 
 # coreboot config options: cpu
-400          1       e       2        hyper_threading
+400	1	e	2	hyper_threading
 
 # coreboot config options: southbridge
-408          1       e       1        nmi
-409          2       e       7        power_on_after_fail
-411          1       e       8        sata_mode
+408	1	e	1	nmi
+409	2	e	7	power_on_after_fail
+411	1	e	8	sata_mode
 
 # coreboot config options: bootloader
 #Used by ChromeOS:
-416        128       r        0        vbnv
+416	128	r	0	vbnv
 
 # coreboot config options: northbridge
-544         3        e      11        gfx_uma_size
+544	3	e	11	gfx_uma_size
 
 # SandyBridge MRC Scrambler Seed values
-896         32        r       0        mrc_scrambler_seed
-928         32        r       0        mrc_scrambler_seed_s3
+896	32	r	0	mrc_scrambler_seed
+928	32	r	0	mrc_scrambler_seed_s3
 
 # coreboot config options: check sums
-984         16       h       0        check_sum
+984	16	h	0	check_sum
 
 # -----------------------------------------------------------------
 
 enumerations
 
-#ID value   text
-1     0     Disable
-1     1     Enable
-2     0     Enable
-2     1     Disable
-4     0     Fallback
-4     1     Normal
-6     0     Emergency
-6     1     Alert
-6     2     Critical
-6     3     Error
-6     4     Warning
-6     5     Notice
-6     6     Info
-6     7     Debug
-6     8     Spew
-7     0     Disable
-7     1     Enable
-7     2     Keep
-8     0     AHCI
-8     1     Compatible
-11    0     32M
-11    1     64M
-11    2     96M
-11    3     128M
-11    4     160M
-11    5     192M
-11    6     224M
+#ID	value	text
+1	0	Disable
+1	1	Enable
+2	0	Enable
+2	1	Disable
+4	0	Fallback
+4	1	Normal
+6	0	Emergency
+6	1	Alert
+6	2	Critical
+6	3	Error
+6	4	Warning
+6	5	Notice
+6	6	Info
+6	7	Debug
+6	8	Spew
+7	0	Disable
+7	1	Enable
+7	2	Keep
+8	0	AHCI
+8	1	Compatible
+11	0	32M
+11	1	64M
+11	2	96M
+11	3	128M
+11	4	160M
+11	5	192M
+11	6	224M
 # -----------------------------------------------------------------
 checksums