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| author | Rudolf Marek <r.marek@assembler.cz> | 2013-05-01 22:29:13 +0200 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2013-05-04 00:26:36 +0200 |
| commit | cc76d7e011ead7350c8b7017c401a584e88154e2 (patch) | |
| tree | 4b9bae55b5a8952fdcff50cd1a7109c3e79e73d0 /src/mainboard/google | |
| parent | dfb0686f8435d8e637a3ab23bc07b0ef5caef0e9 (diff) | |
| download | coreboot-cc76d7e011ead7350c8b7017c401a584e88154e2.tar.xz | |
Asus F2A85-M Enable the SD controller for F2A85-M
If the SD controller is "off" hudson.c won't disable that because,
there is no code for this yet.
The PCI device is still visible and PCI BAR will be allocated
by Linux. Unfortunately it may happen that the particular address
is used by non-standard BAR for SPI controller.
Change-Id: Ied7c581727541e2c81b0b1c2b70fd32de0014730
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Reviewed-on: http://review.coreboot.org/3167
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/google')
0 files changed, 0 insertions, 0 deletions