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authorMatt DeVillier <matt.devillier@gmail.com>2018-07-31 16:53:43 -0500
committerPatrick Georgi <pgeorgi@google.com>2018-08-02 10:53:46 +0000
commiteb7940d8b01111c961958a720c74ce3c6707b1ba (patch)
tree8c32e7dff5b04d312d1b2ff3d268b2766bba7990 /src/mainboard/google
parent0aa52739dd7ddb6f1f0ca51cef57b8ccd3f0b5b2 (diff)
downloadcoreboot-eb7940d8b01111c961958a720c74ce3c6707b1ba.tar.xz
google/cyan: Mask Audio IRQ on boot
Adapted from chromium commit cf18ab6 [Strago: mask Audio IRQ on boot] Do not start with audio interrupt unmasked; this causes interrupt storms on newer kernels that no longer mask all interrupts when initializing Cherryview pincontrol driver. TEST=Boot various cyan boards with kernels 3.18 and 4.14; verify everything works. Original-Change-Id: Id621682d3b59fea3ac54fb0ab92c8df9c78a6d43 Original-Signed-off-by: Dmitry Torokhov <dtor@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/894688 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Change-Id: Icb55c885ea661c41168d3bd24109d2cdbb225546 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/27761 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/mainboard/google')
-rw-r--r--src/mainboard/google/cyan/variants/celes/gpio.c2
-rw-r--r--src/mainboard/google/cyan/variants/cyan/gpio.c2
-rw-r--r--src/mainboard/google/cyan/variants/edgar/gpio.c2
-rw-r--r--src/mainboard/google/cyan/variants/kefka/gpio.c2
-rw-r--r--src/mainboard/google/cyan/variants/reks/gpio.c2
-rw-r--r--src/mainboard/google/cyan/variants/relm/gpio.c2
-rw-r--r--src/mainboard/google/cyan/variants/setzer/gpio.c2
-rw-r--r--src/mainboard/google/cyan/variants/terra/gpio.c2
-rw-r--r--src/mainboard/google/cyan/variants/ultima/gpio.c2
-rw-r--r--src/mainboard/google/cyan/variants/wizpig/gpio.c2
10 files changed, 10 insertions, 10 deletions
diff --git a/src/mainboard/google/cyan/variants/celes/gpio.c b/src/mainboard/google/cyan/variants/celes/gpio.c
index 10ca3b0167..d011428c3a 100644
--- a/src/mainboard/google/cyan/variants/celes/gpio.c
+++ b/src/mainboard/google/cyan/variants/celes/gpio.c
@@ -140,7 +140,7 @@ static const struct soc_gpio_map gpsw_gpio_map[] = {
Native_M1, /* 92 GP_SSP_2_CLK */
NATIVE_PU20K(1), /* 93 PCIE_CLKREQ2B/PCIE_CLKREQ_WLAN# */
Native_M1, /* 94 GP_SSP_2_RXD */
- GPI(trig_edge_both, L1, P_5K_H, non_maskable, en_edge_detect, NA, NA),
+ GPI(trig_edge_both, L1, P_5K_H, 0, en_edge_detect, NA, NA),
/* 95 PCIE_CLKREQ3B/AUDIO_CODEC_IRQ */
Native_M1, /* 96 GP_SSP_2_FS */
NATIVE_FUNC(1, 0, inv_tx_enable), /* 97 GP_SSP_2f_TXD */
diff --git a/src/mainboard/google/cyan/variants/cyan/gpio.c b/src/mainboard/google/cyan/variants/cyan/gpio.c
index 62fcb5e64c..4139f767c3 100644
--- a/src/mainboard/google/cyan/variants/cyan/gpio.c
+++ b/src/mainboard/google/cyan/variants/cyan/gpio.c
@@ -138,7 +138,7 @@ static const struct soc_gpio_map gpsw_gpio_map[] = {
Native_M1, /* 92 GP_SSP_2_CLK */
NATIVE_PU20K(1), /* 93 PCIE_CLKREQ2B/PCIE_CLKREQ_WLAN# */
Native_M1, /* 94 GP_SSP_2_RXD */
- GPI(trig_edge_both, L1, P_5K_H, non_maskable, en_edge_detect, NA, NA),
+ GPI(trig_edge_both, L1, P_5K_H, 0, en_edge_detect, NA, NA),
/* 95 PCIE_CLKREQ3B/AUDIO_CODEC_IRQ */
Native_M1, /* 96 GP_SSP_2_FS */
NATIVE_FUNC(1, 0, inv_tx_enable), /* 97 GP_SSP_2f_TXD */
diff --git a/src/mainboard/google/cyan/variants/edgar/gpio.c b/src/mainboard/google/cyan/variants/edgar/gpio.c
index 97e2dd18cf..d9d2648e37 100644
--- a/src/mainboard/google/cyan/variants/edgar/gpio.c
+++ b/src/mainboard/google/cyan/variants/edgar/gpio.c
@@ -137,7 +137,7 @@ static const struct soc_gpio_map gpsw_gpio_map[] = {
Native_M1, /* 92 GP_SSP_2_CLK */
NATIVE_PU20K(1), /* 93 PCIE_CLKREQ2B/PCIE_CLKREQ_WLAN# */
Native_M1, /* 94 GP_SSP_2_RXD */
- GPI(trig_edge_both, L1, P_5K_H, non_maskable, en_edge_detect, NA, NA),
+ GPI(trig_edge_both, L1, P_5K_H, 0, en_edge_detect, NA, NA),
/* 95 PCIE_CLKREQ3B/AUDIO_CODEC_IRQ */
Native_M1, /* 96 GP_SSP_2_FS */
NATIVE_FUNC(1, 0, inv_tx_enable), /* 97 GP_SSP_2f_TXD */
diff --git a/src/mainboard/google/cyan/variants/kefka/gpio.c b/src/mainboard/google/cyan/variants/kefka/gpio.c
index 8340f1acaa..76549ba458 100644
--- a/src/mainboard/google/cyan/variants/kefka/gpio.c
+++ b/src/mainboard/google/cyan/variants/kefka/gpio.c
@@ -137,7 +137,7 @@ static const struct soc_gpio_map gpsw_gpio_map[] = {
Native_M1, /* 92 GP_SSP_2_CLK */
NATIVE_PU20K(1), /* 93 PCIE_CLKREQ2B/PCIE_CLKREQ_WLAN# */
Native_M1, /* 94 GP_SSP_2_RXD */
- GPI(trig_edge_both, L1, P_5K_H, non_maskable, en_edge_detect, NA, NA),
+ GPI(trig_edge_both, L1, P_5K_H, 0, en_edge_detect, NA, NA),
/* 95 PCIE_CLKREQ3B/AUDIO_CODEC_IRQ */
Native_M1, /* 96 GP_SSP_2_FS */
NATIVE_FUNC(1, 0, inv_tx_enable), /* 97 GP_SSP_2f_TXD */
diff --git a/src/mainboard/google/cyan/variants/reks/gpio.c b/src/mainboard/google/cyan/variants/reks/gpio.c
index 74792bdc28..1a9e5404ef 100644
--- a/src/mainboard/google/cyan/variants/reks/gpio.c
+++ b/src/mainboard/google/cyan/variants/reks/gpio.c
@@ -139,7 +139,7 @@ static const struct soc_gpio_map gpsw_gpio_map[] = {
Native_M1, /* 92 GP_SSP_2_CLK */
NATIVE_PU20K(1), /* 93 PCIE_CLKREQ2B/PCIE_CLKREQ_WLAN# */
Native_M1, /* 94 GP_SSP_2_RXD */
- GPI(trig_edge_both, L1, P_5K_H, non_maskable, en_edge_detect, NA, NA),
+ GPI(trig_edge_both, L1, P_5K_H, 0, en_edge_detect, NA, NA),
/* 95 PCIE_CLKREQ3B/AUDIO_CODEC_IRQ */
Native_M1, /* 96 GP_SSP_2_FS */
NATIVE_FUNC(1, 0, inv_tx_enable), /* 97 GP_SSP_2f_TXD */
diff --git a/src/mainboard/google/cyan/variants/relm/gpio.c b/src/mainboard/google/cyan/variants/relm/gpio.c
index 6b75a84150..6c1dbdced8 100644
--- a/src/mainboard/google/cyan/variants/relm/gpio.c
+++ b/src/mainboard/google/cyan/variants/relm/gpio.c
@@ -140,7 +140,7 @@ static const struct soc_gpio_map gpsw_gpio_map[] = {
Native_M1, /* 92 GP_SSP_2_CLK */
NATIVE_PU20K(1), /* 93 PCIE_CLKREQ2B/PCIE_CLKREQ_WLAN# */
Native_M1, /* 94 GP_SSP_2_RXD */
- GPI(trig_edge_both, L1, P_5K_H, non_maskable, en_edge_detect, NA, NA),
+ GPI(trig_edge_both, L1, P_5K_H, 0, en_edge_detect, NA, NA),
/* 95 PCIE_CLKREQ3B/AUDIO_CODEC_IRQ */
Native_M1, /* 96 GP_SSP_2_FS */
NATIVE_FUNC(1, 0, inv_tx_enable), /* 97 GP_SSP_2f_TXD */
diff --git a/src/mainboard/google/cyan/variants/setzer/gpio.c b/src/mainboard/google/cyan/variants/setzer/gpio.c
index a1564c1bbe..df1bff1cef 100644
--- a/src/mainboard/google/cyan/variants/setzer/gpio.c
+++ b/src/mainboard/google/cyan/variants/setzer/gpio.c
@@ -138,7 +138,7 @@ static const struct soc_gpio_map gpsw_gpio_map[] = {
Native_M1, /* 92 GP_SSP_2_CLK */
NATIVE_PU20K(1), /* 93 PCIE_CLKREQ2B/PCIE_CLKREQ_WLAN# */
Native_M1, /* 94 GP_SSP_2_RXD */
- GPI(trig_edge_both, L1, P_5K_H, non_maskable, en_edge_detect, NA, NA),
+ GPI(trig_edge_both, L1, P_5K_H, 0, en_edge_detect, NA, NA),
/* 95 PCIE_CLKREQ3B/AUDIO_CODEC_IRQ */
Native_M1, /* 96 GP_SSP_2_FS */
NATIVE_FUNC(1, 0, inv_tx_enable), /* 97 GP_SSP_2f_TXD */
diff --git a/src/mainboard/google/cyan/variants/terra/gpio.c b/src/mainboard/google/cyan/variants/terra/gpio.c
index 3f5c19d782..8328eddfec 100644
--- a/src/mainboard/google/cyan/variants/terra/gpio.c
+++ b/src/mainboard/google/cyan/variants/terra/gpio.c
@@ -136,7 +136,7 @@ static const struct soc_gpio_map gpsw_gpio_map[] = {
Native_M1, /* 92 GP_SSP_2_CLK */
NATIVE_PU20K(1), /* 93 PCIE_CLKREQ2B/PCIE_CLKREQ_WLAN# */
Native_M1, /* 94 GP_SSP_2_RXD */
- GPI(trig_edge_both, L1, P_5K_H, non_maskable, en_edge_detect, NA, NA),
+ GPI(trig_edge_both, L1, P_5K_H, 0, en_edge_detect, NA, NA),
/* 95 PCIE_CLKREQ3B/AUDIO_CODEC_IRQ */
Native_M1, /* 96 GP_SSP_2_FS */
NATIVE_FUNC(1, 0, inv_tx_enable), /* 97 GP_SSP_2f_TXD */
diff --git a/src/mainboard/google/cyan/variants/ultima/gpio.c b/src/mainboard/google/cyan/variants/ultima/gpio.c
index 4e4f0f637c..c6875b4ef2 100644
--- a/src/mainboard/google/cyan/variants/ultima/gpio.c
+++ b/src/mainboard/google/cyan/variants/ultima/gpio.c
@@ -139,7 +139,7 @@ static const struct soc_gpio_map gpsw_gpio_map[] = {
Native_M1, /* 92 GP_SSP_2_CLK */
NATIVE_PU20K(1), /* 93 PCIE_CLKREQ2B/PCIE_CLKREQ_WLAN# */
Native_M1, /* 94 GP_SSP_2_RXD */
- GPI(trig_edge_both, L1, P_5K_H, non_maskable, en_edge_detect, NA, NA),
+ GPI(trig_edge_both, L1, P_5K_H, 0, en_edge_detect, NA, NA),
/* 95 PCIE_CLKREQ3B/AUDIO_CODEC_IRQ */
Native_M1, /* 96 GP_SSP_2_FS */
NATIVE_FUNC(1, 0, inv_tx_enable), /* 97 GP_SSP_2f_TXD */
diff --git a/src/mainboard/google/cyan/variants/wizpig/gpio.c b/src/mainboard/google/cyan/variants/wizpig/gpio.c
index cadaf02b47..361143932c 100644
--- a/src/mainboard/google/cyan/variants/wizpig/gpio.c
+++ b/src/mainboard/google/cyan/variants/wizpig/gpio.c
@@ -138,7 +138,7 @@ static const struct soc_gpio_map gpsw_gpio_map[] = {
Native_M1, /* 92 GP_SSP_2_CLK */
NATIVE_PU20K(1), /* 93 PCIE_CLKREQ2B/PCIE_CLKREQ_WLAN# */
Native_M1, /* 94 GP_SSP_2_RXD */
- GPI(trig_edge_both, L1, P_5K_H, non_maskable, en_edge_detect, NA, NA),
+ GPI(trig_edge_both, L1, P_5K_H, 0, en_edge_detect, NA, NA),
/* 95 PCIE_CLKREQ3B/AUDIO_CODEC_IRQ */
Native_M1, /* 96 GP_SSP_2_FS */
NATIVE_FUNC(1, 0, inv_tx_enable), /* 97 GP_SSP_2f_TXD */