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authorAngel Pons <th3fanbus@gmail.com>2020-07-03 13:51:15 +0200
committerAngel Pons <th3fanbus@gmail.com>2020-07-09 16:25:43 +0000
commit03f0e43a3c4172941f2eadf30f89413632b90cb4 (patch)
tree8f625362a7b465c8f9e77c22333c0c3b3c181bb8 /src/mainboard/google
parentf0b5e91b1b76c6034750cfdd45f149cba12aab5e (diff)
downloadcoreboot-03f0e43a3c4172941f2eadf30f89413632b90cb4.tar.xz
haswell: Drop GPIO indirection layers
This simplifies things and makes type checking possible. Change-Id: Iefc9baabae286aac2f2c46853adf1f6edf01586f Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43103 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tristan Corrick <tristan@corrick.kiwi>
Diffstat (limited to 'src/mainboard/google')
-rw-r--r--src/mainboard/google/beltino/romstage.c3
-rw-r--r--src/mainboard/google/slippy/romstage.c3
2 files changed, 0 insertions, 6 deletions
diff --git a/src/mainboard/google/beltino/romstage.c b/src/mainboard/google/beltino/romstage.c
index c49d94fe3e..5d9c37c016 100644
--- a/src/mainboard/google/beltino/romstage.c
+++ b/src/mainboard/google/beltino/romstage.c
@@ -11,8 +11,6 @@
#include <superio/ite/it8772f/it8772f.h>
#include "onboard.h"
-extern const struct pch_lp_gpio_map mainboard_gpio_map[];
-
void mainboard_config_rcba(void)
{
/*
@@ -107,7 +105,6 @@ void mainboard_romstage_entry(void)
struct romstage_params romstage_params = {
.pei_data = &pei_data,
- .gpio_map = &mainboard_gpio_map,
};
/* Early SuperIO setup */
diff --git a/src/mainboard/google/slippy/romstage.c b/src/mainboard/google/slippy/romstage.c
index bc14ee029c..5261ddc377 100644
--- a/src/mainboard/google/slippy/romstage.c
+++ b/src/mainboard/google/slippy/romstage.c
@@ -8,8 +8,6 @@
#include <southbridge/intel/lynxpoint/lp_gpio.h>
#include "variant.h"
-extern const struct pch_lp_gpio_map mainboard_gpio_map[];
-
void mainboard_config_rcba(void)
{
/*
@@ -77,7 +75,6 @@ void mainboard_romstage_entry(void)
struct romstage_params romstage_params = {
.pei_data = &pei_data,
- .gpio_map = &mainboard_gpio_map,
};
variant_romstage_entry(&romstage_params);