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authorFurquan Shaikh <furquan@google.com>2020-10-04 12:13:07 -0700
committerFurquan Shaikh <furquan@google.com>2020-10-11 02:14:21 +0000
commit0af1926353d48242f03d6c80c6b2c8f646a3c145 (patch)
tree2f59f541218df51bdae7786e9980cc591899483f /src/mainboard/google
parent54b27169904538081f85f50a5a0873ba35d8ea16 (diff)
downloadcoreboot-0af1926353d48242f03d6c80c6b2c8f646a3c145.tar.xz
drivers/wifi: Drop maxsleep parameter from chip config
This change drops maxsleep parameter from chip config and instead hardcodes the deepest sleep state from which the WiFi device can wake the system up from to SLP_TYP_S3. This is similar to how other device drivers in coreboot report _PRW property in ACPI. It relieves the users from adding another register attribute to devicetree since all mainboards configure the same value. If this changes in the future, it should be easy to bring the maxsleep config parameter back. BUG=b:169802515 BRANCH=zork Change-Id: I42131fced008da0d51f0f777b7f2d99deaf68827 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46033 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard/google')
-rw-r--r--src/mainboard/google/dedede/variants/madoo/overridetree.cb1
-rw-r--r--src/mainboard/google/dedede/variants/magolor/overridetree.cb1
-rw-r--r--src/mainboard/google/dedede/variants/waddledee/overridetree.cb1
3 files changed, 0 insertions, 3 deletions
diff --git a/src/mainboard/google/dedede/variants/madoo/overridetree.cb b/src/mainboard/google/dedede/variants/madoo/overridetree.cb
index 039fd108b3..257f91722e 100644
--- a/src/mainboard/google/dedede/variants/madoo/overridetree.cb
+++ b/src/mainboard/google/dedede/variants/madoo/overridetree.cb
@@ -103,7 +103,6 @@ chip soc/intel/jasperlake
device pci 1c.7 on
chip drivers/wifi/generic
register "wake" = "GPE0_DW2_03"
- register "maxsleep" = "3"
device pci 00.0 on end
end
end # PCI Express Root Port 8 - WLAN
diff --git a/src/mainboard/google/dedede/variants/magolor/overridetree.cb b/src/mainboard/google/dedede/variants/magolor/overridetree.cb
index 8a83b83028..f41e9fab6b 100644
--- a/src/mainboard/google/dedede/variants/magolor/overridetree.cb
+++ b/src/mainboard/google/dedede/variants/magolor/overridetree.cb
@@ -287,7 +287,6 @@ chip soc/intel/jasperlake
device pci 1c.7 on
chip drivers/wifi/generic
register "wake" = "GPE0_DW2_03"
- register "maxsleep" = "3"
device pci 00.0 on end
end
end # PCI Express Root Port 8 - WLAN
diff --git a/src/mainboard/google/dedede/variants/waddledee/overridetree.cb b/src/mainboard/google/dedede/variants/waddledee/overridetree.cb
index a525a0f2c5..22a08a060e 100644
--- a/src/mainboard/google/dedede/variants/waddledee/overridetree.cb
+++ b/src/mainboard/google/dedede/variants/waddledee/overridetree.cb
@@ -147,7 +147,6 @@ chip soc/intel/jasperlake
device pci 1c.7 on
chip drivers/wifi/generic
register "wake" = "GPE0_DW2_03"
- register "maxsleep" = "3"
device pci 00.0 on end
end
end # PCI Express Root Port 8 - WLAN