diff options
| author | Sumeet Pawnikar <sumeet.r.pawnikar@intel.com> | 2019-09-17 17:13:42 +0530 |
|---|---|---|
| committer | Furquan Shaikh <furquan@google.com> | 2019-09-18 14:18:49 +0000 |
| commit | 39da5326f5ac6fd43359cc364f3cedf5d2092383 (patch) | |
| tree | 8ecd10f0546f7a97a980f15d3c542442edb32dc9 /src/mainboard/google | |
| parent | f9beb3c0a525094b57ca928657d0c5341728f03c (diff) | |
| download | coreboot-39da5326f5ac6fd43359cc364f3cedf5d2092383.tar.xz | |
mb/google/hatch/variants/helios: Update DPTF parameters
Update DPTF thermal temperature threshold values for CML based
Helios system. This updates CPU active cooling temperature
threshold to appropriate values which addresses the issue of
running the Fan at lower CPU temperature as per bug.
Also, added active cooling temperature thresholds for other
TSR sensors.
BUG=b:141087272
BRANCH=None
TEST=Build and boot on Helios board to check the fan functionality.
Change-Id: I5c8502f8c9e6121c18024d2a8d5a4f7680797b8d
Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35446
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google')
| -rw-r--r-- | src/mainboard/google/hatch/variants/helios/include/variant/acpi/dptf.asl | 28 |
1 files changed, 20 insertions, 8 deletions
diff --git a/src/mainboard/google/hatch/variants/helios/include/variant/acpi/dptf.asl b/src/mainboard/google/hatch/variants/helios/include/variant/acpi/dptf.asl index 30dcf13fb9..9aa3928389 100644 --- a/src/mainboard/google/hatch/variants/helios/include/variant/acpi/dptf.asl +++ b/src/mainboard/google/hatch/variants/helios/include/variant/acpi/dptf.asl @@ -15,21 +15,33 @@ #define DPTF_CPU_PASSIVE 95 #define DPTF_CPU_CRITICAL 105 -#define DPTF_CPU_ACTIVE_AC0 55 -#define DPTF_CPU_ACTIVE_AC1 50 -#define DPTF_CPU_ACTIVE_AC2 45 -#define DPTF_CPU_ACTIVE_AC3 30 -#define DPTF_CPU_ACTIVE_AC4 20 +#define DPTF_CPU_ACTIVE_AC0 87 +#define DPTF_CPU_ACTIVE_AC1 85 +#define DPTF_CPU_ACTIVE_AC2 83 +#define DPTF_CPU_ACTIVE_AC3 80 +#define DPTF_CPU_ACTIVE_AC4 75 #define DPTF_TSR0_SENSOR_ID 0 #define DPTF_TSR0_SENSOR_NAME "Thermal Sensor 1" -#define DPTF_TSR0_PASSIVE 0 -#define DPTF_TSR0_CRITICAL 0 +#define DPTF_TSR0_PASSIVE 65 +#define DPTF_TSR0_CRITICAL 75 +#define DPTF_TSR0_ACTIVE_AC0 50 +#define DPTF_TSR0_ACTIVE_AC1 47 +#define DPTF_TSR0_ACTIVE_AC2 45 +#define DPTF_TSR0_ACTIVE_AC3 42 +#define DPTF_TSR0_ACTIVE_AC4 40 +#define DPTF_TSR0_ACTIVE_AC5 38 #define DPTF_TSR1_SENSOR_ID 1 #define DPTF_TSR1_SENSOR_NAME "Thermal Sensor 2" #define DPTF_TSR1_PASSIVE 45 -#define DPTF_TSR1_CRITICAL 0 +#define DPTF_TSR1_CRITICAL 65 +#define DPTF_TSR1_ACTIVE_AC0 50 +#define DPTF_TSR1_ACTIVE_AC1 47 +#define DPTF_TSR1_ACTIVE_AC2 45 +#define DPTF_TSR1_ACTIVE_AC3 42 +#define DPTF_TSR1_ACTIVE_AC4 40 +#define DPTF_TSR1_ACTIVE_AC5 38 #define DPTF_ENABLE_CHARGER #define DPTF_ENABLE_FAN_CONTROL |