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authorRob Barnes <robbarnes@google.com>2020-10-01 15:08:38 -0600
committerPaul Fagerburg <pfagerburg@chromium.org>2020-10-08 22:22:32 +0000
commit481ab24f46fc3e15b501d0aeb0e494b9cbd390d6 (patch)
tree29cc487a6a969007156e630d5150918262f58a0c /src/mainboard/google
parent7e6ee912c689d01b36735db7d893a35916f01c96 (diff)
downloadcoreboot-481ab24f46fc3e15b501d0aeb0e494b9cbd390d6.tar.xz
mb/google/zork/morphius: Increase eMMC initial clock frequency
This will reduce boot time by 7ms. Some of the initial designs don't have a pull-up resistor on the CMD line. These designs still boot at 400 kHz despite not having the pull-up. BUG=b:158766134 TEST=Boot on morphius with and without patch, confirm ~7ms improvement BRANCH=zork Signed-off-by: Rob Barnes <robbarnes@google.com> Change-Id: I7f6efd3d5839f154f2487a07654be8e35634bbbc Reviewed-on: https://review.coreboot.org/c/coreboot/+/45932 Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google')
-rw-r--r--src/mainboard/google/zork/variants/morphius/overridetree.cb6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/mainboard/google/zork/variants/morphius/overridetree.cb b/src/mainboard/google/zork/variants/morphius/overridetree.cb
index 41e1c70a74..43a94390a3 100644
--- a/src/mainboard/google/zork/variants/morphius/overridetree.cb
+++ b/src/mainboard/google/zork/variants/morphius/overridetree.cb
@@ -50,6 +50,12 @@ chip soc/amd/picasso
.early_init = true,
}"
+ register "emmc_config" = "{
+ .timing = SD_EMMC_EMMC_HS400,
+ .sdr104_hs400_driver_strength = SD_EMMC_DRIVE_STRENGTH_A,
+ .init_khz_preset = 400,
+ }"
+
# See AMD 55570-B1 Table 13: PCI Device ID Assignments.
device domain 0 on
subsystemid 0x1022 0x1510 inherit