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authorMaulik V Vaghela <maulik.v.vaghela@intel.com>2018-12-31 09:57:48 +0530
committerSubrata Banik <subrata.banik@intel.com>2019-01-01 13:29:25 +0000
commita9fadb007ddafd7196f9916439674b63d06e7573 (patch)
treef4b05447637278ecd773783bb8b4087321a04f63 /src/mainboard/google
parent2e658f8edf2f6b08f160297c0300103f5367ac3e (diff)
downloadcoreboot-a9fadb007ddafd7196f9916439674b63d06e7573.tar.xz
mb/google/hatch: Add NC gpios for display and correct the order
Correcting order of display related GPIOs and also adding not connected pin definitions for display GPIOs BUG=b:120914069 BRANCH=none TEST=check if code compiles with changes. Change-Id: I9498284d263516f65513d6395883b6b09dd70fd5 Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com> Reviewed-on: https://review.coreboot.org/c/30544 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subrata.banik@intel.com> Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Diffstat (limited to 'src/mainboard/google')
-rw-r--r--src/mainboard/google/hatch/variants/baseboard/gpio.c22
1 files changed, 16 insertions, 6 deletions
diff --git a/src/mainboard/google/hatch/variants/baseboard/gpio.c b/src/mainboard/google/hatch/variants/baseboard/gpio.c
index 2a6f74d888..6bb2e76d4a 100644
--- a/src/mainboard/google/hatch/variants/baseboard/gpio.c
+++ b/src/mainboard/google/hatch/variants/baseboard/gpio.c
@@ -55,6 +55,22 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_NF(GPP_E11, NONE, DEEP, NF1),
/* USB_A_OC_OD USB_OC3*/
PAD_CFG_NF(GPP_E12, NONE, DEEP, NF1),
+ /* USB_C0_DP_HPD */
+ PAD_CFG_NF(GPP_E13, NONE, DEEP, NF1),
+ /* DDI2_HPD_ODL */
+ PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1),
+ /* DDPD_HPD2 => NC */
+ PAD_NC(GPP_E15, DN_20K),
+ /* DDPE_HPD2 => NC */
+ PAD_NC(GPP_E16, DN_20K),
+ /* EDP_HPD */
+ PAD_CFG_NF(GPP_E17, NONE, DEEP, NF1),
+ /* DDPB_CTRLCLK => NC */
+ PAD_NC(GPP_E18, DN_20K),
+ /* DDPC_CTRLCLK => NC */
+ PAD_NC(GPP_E20, DN_20K),
+ /* DDPD_CTRLCLK => NC */
+ PAD_NC(GPP_E22, DN_20K),
/* PCH_MEM_STRAP0 */
PAD_CFG_GPI(GPP_F20, NONE, PLTRST),
/* PCH_MEM_STRAP1 */
@@ -63,12 +79,6 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_GPI(GPP_F11, NONE, PLTRST),
/* PCH_MEM_STRAP3 */
PAD_CFG_GPI(GPP_F22, NONE, PLTRST),
- /* USB_C0_DP_HPD */
- PAD_CFG_NF(GPP_E13, NONE, DEEP, NF1),
- /* DDI2_HPD_ODL */
- PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1),
- /* EDP_HPD */
- PAD_CFG_NF(GPP_E17, NONE, DEEP, NF1),
};
const struct pad_config *__weak variant_gpio_table(size_t *num)