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authorDuncan Laurie <dlaurie@google.com>2018-12-01 17:15:29 -0800
committerDuncan Laurie <dlaurie@chromium.org>2018-12-04 22:50:26 +0000
commitb0a0c6cab7623f3a1fc7707610742bc952a35e80 (patch)
tree8314f222ae00d55515f90ae9f731b208f799236f /src/mainboard/google
parente1eca1d91cf05b8769e830b5ab59060a0ad5ff0c (diff)
downloadcoreboot-b0a0c6cab7623f3a1fc7707610742bc952a35e80.tar.xz
mb/google/eve: Define USB port peers
Add ACPI _PLD group definitions for the external ports that indicate which USB2 and USB3 ports share the same physical interface. Change-Id: I7f85720a878a3774d453a9adb82518722f7ba23d Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://review.coreboot.org/c/29999 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/mainboard/google')
-rw-r--r--src/mainboard/google/eve/devicetree.cb4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/mainboard/google/eve/devicetree.cb b/src/mainboard/google/eve/devicetree.cb
index e0ef3b0cef..44449a5d2e 100644
--- a/src/mainboard/google/eve/devicetree.cb
+++ b/src/mainboard/google/eve/devicetree.cb
@@ -260,6 +260,7 @@ chip soc/intel/skylake
chip drivers/usb/acpi
register "desc" = ""USB2 Type-C Left""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
+ register "group" = "ACPI_PLD_GROUP(1, 1)"
device usb 2.0 on end
end
chip drivers/usb/acpi
@@ -275,6 +276,7 @@ chip soc/intel/skylake
chip drivers/usb/acpi
register "desc" = ""USB2 Type-C Right""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
+ register "group" = "ACPI_PLD_GROUP(2, 1)"
device usb 2.4 on end
end
chip drivers/usb/acpi
@@ -285,11 +287,13 @@ chip soc/intel/skylake
chip drivers/usb/acpi
register "desc" = ""USB3 Type-C Left""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
+ register "group" = "ACPI_PLD_GROUP(1, 1)"
device usb 3.0 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-C Right""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
+ register "group" = "ACPI_PLD_GROUP(2, 1)"
device usb 3.1 on end
end
end