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| author | Aaron Durbin <adurbin@chromium.org> | 2016-11-29 23:14:25 -0600 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2016-12-01 08:17:42 +0100 |
| commit | b4afe3c19747758412c734132e5e342a9b3572b1 (patch) | |
| tree | 014c675dd3ca4bc7bb1407f4969d593ba78bc8ce /src/mainboard/google | |
| parent | d008413a3c46d4346f3cc398bbfd60b875ff3084 (diff) | |
| download | coreboot-b4afe3c19747758412c734132e5e342a9b3572b1.tar.xz | |
lib/nhlt: add support for setting the oem_revision
In the ACPI header there's an OEM revision field that was previously
just being implicitly set to 0. Allow for a board to provide a
non-zero value for this field.
Change-Id: Icd40c1c162c2645b3990a6f3361c592706251f82
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/17650
Tested-by: build bot (Jenkins)
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/mainboard/google')
| -rw-r--r-- | src/mainboard/google/reef/mainboard.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/mainboard/google/reef/mainboard.c b/src/mainboard/google/reef/mainboard.c index 4d4ef53ff8..44858d4946 100644 --- a/src/mainboard/google/reef/mainboard.c +++ b/src/mainboard/google/reef/mainboard.c @@ -54,6 +54,7 @@ static unsigned long mainboard_write_acpi_tables( struct nhlt *nhlt; const char *oem_id = NULL; const char *oem_table_id = NULL; + uint32_t oem_revision = 0; start_addr = current; @@ -66,7 +67,7 @@ static unsigned long mainboard_write_acpi_tables( variant_nhlt_oem_strings(&oem_id, &oem_table_id); end_addr = nhlt_soc_serialize_oem_overrides(nhlt, start_addr, - oem_id, oem_table_id); + oem_id, oem_table_id, oem_revision); if (end_addr != start_addr) acpi_add_table(rsdp, (void *)start_addr); |