diff options
author | Duncan Laurie <dlaurie@chromium.org> | 2017-06-20 20:42:38 -0700 |
---|---|---|
committer | Duncan Laurie <dlaurie@chromium.org> | 2017-07-01 02:49:21 +0000 |
commit | dea94abebba0868526b2a9dcf9627a7a628ba522 (patch) | |
tree | 262b0ce8121104d1b95052e1dffa82de8e9d793a /src/mainboard/google | |
parent | af81a9132a59b5c3abbb3e56574398fe236ba6f9 (diff) | |
download | coreboot-dea94abebba0868526b2a9dcf9627a7a628ba522.tar.xz |
mb/google/eve: Do not limit memory speed on new SKU 5 boards
Board changes in rev6+ have a fix to VDDQ that should fix the issue
that was being seen with this SKU, so only lower the memory speed on
older boards.
BUG=b:37172778
TEST=memory stress testing on rev6 boards
Change-Id: I6d6fe730cabd74af23eab3f02feef9da01a35fd4
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://review.coreboot.org/20429
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/mainboard/google')
-rw-r--r-- | src/mainboard/google/eve/romstage.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/mainboard/google/eve/romstage.c b/src/mainboard/google/eve/romstage.c index cd8fa083a9..6f8ff0f19c 100644 --- a/src/mainboard/google/eve/romstage.c +++ b/src/mainboard/google/eve/romstage.c @@ -14,6 +14,7 @@ * GNU General Public License for more details. */ +#include <boardid.h> #include <string.h> #include <stddef.h> #include <fsp/soc_binding.h> @@ -49,7 +50,7 @@ void mainboard_memory_init_params(FSPM_UPD *mupd) mem_cfg->MemorySpdDataLen = SPD_LEN; /* Limit K4EBE304EB-EGCF memory to 1600MHz for stability */ - if (mainboard_get_spd_index() == 5) { + if (board_id() < 6 && mainboard_get_spd_index() == 5) { printk(BIOS_WARNING, "Limiting memory to 1600MHz\n"); mem_cfg->DdrFreqLimit = 1600; } |