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authorLeilk Liu <leilk.liu@mediatek.com>2015-07-31 17:10:46 +0800
committerPatrick Georgi <pgeorgi@google.com>2016-01-22 19:29:13 +0100
commit261059479ab788b2485c25bad03d49c7cf0eabad (patch)
treeaf53e5ff3c8dcf2e34c4be77b34726677b2cb819 /src/mainboard/google
parent1dda32bb13c6c92a1c3ab94110a42ddc8b12dac9 (diff)
downloadcoreboot-261059479ab788b2485c25bad03d49c7cf0eabad.tar.xz
google/oak: Enable SPI support
BUG=none TEST=emerge-oak coreboot BRANCH=none [pg: split into multiple commits] Change-Id: I19f970db40fb8563ef1b782a9606ca3766ef2ac5 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 41acc14e9fe54924d20e4e5a2d1519251f0e1c87 Original-Change-Id: I2559be4191da9af523944563729171bd92a86cd0 Original-Signed-off-by: Leilk Liu <leilk.liu@mediatek.com> Original-Reviewed-on: https://chromium-review.googlesource.com/292661 Original-Commit-Ready: Yidi Lin <yidi.lin@mediatek.com> Original-Tested-by: Yidi Lin <yidi.lin@mediatek.com> Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/13076 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/google')
-rw-r--r--src/mainboard/google/oak/bootblock.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/mainboard/google/oak/bootblock.c b/src/mainboard/google/oak/bootblock.c
index 023c90ed24..3d7855149f 100644
--- a/src/mainboard/google/oak/bootblock.c
+++ b/src/mainboard/google/oak/bootblock.c
@@ -21,6 +21,7 @@
#include <soc/mt6391.h>
#include <soc/pericfg.h>
#include <soc/pinmux.h>
+#include <soc/spi.h>
#include "gpio.h"
@@ -46,6 +47,8 @@ void bootblock_mainboard_init(void)
/* set i2c related gpio */
i2c_set_gpio_pinmux();
+ mtk_spi_init(CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS, SPI_PAD1_MASK, 6*MHz);
+
setup_chromeos_gpios();
if (board_id() < 4)