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authorShelley Chen <shchen@google.com>2019-02-20 14:09:25 -0800
committerShelley Chen <shchen@google.com>2019-02-22 19:00:50 +0000
commit26905f70b78854ab2e06e03be62e367fe8fb8404 (patch)
treeb97563348345804fb57f88dc86e465a0c1babb47 /src/mainboard/google
parent71c0a9498702afb3a94cf36a6eec7aec8f9890b2 (diff)
downloadcoreboot-26905f70b78854ab2e06e03be62e367fe8fb8404.tar.xz
mb/google/hatch: Enable wake from trackpad
For some reason, wake does not currently work from GPP_D21, but IRQs are working fine from that gpio. Thus, we have to switch IRQ to GPP_D21 and wake to GPP_A21, which was previously used for IRQs from the trackpad. Additionally, we need to use two gpios for irqs and wake source at the moment because of b:123967687, where FSP is locking down PCR and configuring ITSS. We need to configure the wake source gpio as inverted and the IRQ gpio as non-inverted until the bug is resolved. BUG=b:121212459 BRANCH=None TEST=run evtest with trackpad Use trackpad with ChromeOS UI and make sure it reacts as expected. Run powerd_dbus_suspend and press trackpad and make sure DUT wakes. Change-Id: I7b236136befc05c6586d9ba69185ed4b5d385273 Signed-off-by: Shelley Chen <shchen@google.com> Reviewed-on: https://review.coreboot.org/c/31533 Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google')
-rw-r--r--src/mainboard/google/hatch/variants/baseboard/devicetree.cb3
-rw-r--r--src/mainboard/google/hatch/variants/baseboard/gpio.c14
2 files changed, 12 insertions, 5 deletions
diff --git a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb
index aaef66365b..f913e77558 100644
--- a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb
@@ -200,7 +200,8 @@ chip soc/intel/cannonlake
chip drivers/i2c/generic
register "hid" = ""ELAN0000""
register "desc" = ""ELAN Touchpad""
- register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_A21_IRQ)"
+ register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_D21_IRQ)"
+ register "wake" = "GPE0_DW0_21"
device i2c 15 on end
end
end # I2C #0
diff --git a/src/mainboard/google/hatch/variants/baseboard/gpio.c b/src/mainboard/google/hatch/variants/baseboard/gpio.c
index badd978397..769d2abf2e 100644
--- a/src/mainboard/google/hatch/variants/baseboard/gpio.c
+++ b/src/mainboard/google/hatch/variants/baseboard/gpio.c
@@ -28,11 +28,11 @@ static const struct pad_config gpio_table[] = {
/* WWAN_RADIO_DISABLE_1V8_ODL */
PAD_CFG_GPO(GPP_A19, 1, DEEP),
/*
- * TRACKPAD_INT_ODL
- * TODO Configure it back to invert mode, when
- * ITSS IPCx configuration is fixed in FSP.
+ * TRACKPAD_INT_ODL (wake)
+ * TODO Combine into single gpio, when ITSS IPCx configuration
+ * is fixed in FSP.
*/
- PAD_CFG_GPI_APIC(GPP_A21, NONE, PLTRST, LEVEL, NONE),
+ PAD_CFG_GPI_SCI(GPP_A21, NONE, DEEP, EDGE_SINGLE, INVERT),
/* SRCCLKREQ1 */
PAD_CFG_NF(GPP_B6, NONE, DEEP, NF1),
/* PCIE_14_WLAN_CLKREQ_ODL */
@@ -97,6 +97,12 @@ static const struct pad_config gpio_table[] = {
* ITSS IPCx configuration is fixed in FSP.
*/
PAD_CFG_GPI_APIC(GPP_D16, NONE, DEEP, LEVEL, NONE),
+ /*
+ * TRACKPAD_INT_ODL
+ * TODO Combine into single gpio with invert mode, when ITSS
+ * IPCx configuration is fixed in FSP.
+ */
+ PAD_CFG_GPI_APIC(GPP_D21, NONE, PLTRST, LEVEL, NONE),
/* SATAGP1 */
PAD_CFG_NF(GPP_E1, NONE, DEEP, NF2),
/* M2_SSD_PE_WAKE_ODL */