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authorVaradarajan Narayanan <varada@codeaurora.org>2015-09-09 13:45:47 +0530
committerPatrick Georgi <pgeorgi@google.com>2016-05-10 22:57:21 +0200
commit3a749ee654f5e6035d207148167c287374d1bd00 (patch)
treea1b962d8550ba5e6d8db258f79df5e3caa331cec /src/mainboard/google
parentc3f16a96b963ac077f375649d769805bcd4374d1 (diff)
downloadcoreboot-3a749ee654f5e6035d207148167c287374d1bd00.tar.xz
google/gale: Remove NAND init
This is stale code from ipq806x, n/a for ipq40xx. Hence removing it. BUG=chrome-os-partner:49249 TEST=None. Initial code not sure if it will even compile BRANCH=none Change-Id: I2ac73677f77d4bfbc70f56c73a661cc2c22dd384 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 2f9796588648bc477f118282aad89037f0577f23 Original-Change-Id: I8bcf928ee23ac24a21b0e633e207354ea9fa0511 Original-Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org> Original-Reviewed-on: https://chromium-review.googlesource.com/333299 Original-Commit-Ready: David Hendricks <dhendrix@chromium.org> Original-Reviewed-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: https://review.coreboot.org/14664 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/google')
-rw-r--r--src/mainboard/google/gale/cdp.c40
-rw-r--r--src/mainboard/google/gale/mainboard.c2
2 files changed, 0 insertions, 42 deletions
diff --git a/src/mainboard/google/gale/cdp.c b/src/mainboard/google/gale/cdp.c
index f8af96a88b..11a0f687eb 100644
--- a/src/mainboard/google/gale/cdp.c
+++ b/src/mainboard/google/gale/cdp.c
@@ -30,43 +30,3 @@ void ipq_configure_gpio(const gpio_func_data_t *gpio, unsigned count)
gpio++;
}
}
-
-static void configure_nand_gpio(void)
-{
- /* EBI2 CS, CLE, ALE, WE, OE */
- gpio_tlmm_config(34, 1, 0, GPIO_NO_PULL, GPIO_10MA, GPIO_DISABLE);
- gpio_tlmm_config(35, 1, 0, GPIO_NO_PULL, GPIO_10MA, GPIO_DISABLE);
- gpio_tlmm_config(36, 1, 0, GPIO_NO_PULL, GPIO_10MA, GPIO_DISABLE);
- gpio_tlmm_config(37, 1, 0, GPIO_NO_PULL, GPIO_10MA, GPIO_DISABLE);
- gpio_tlmm_config(38, 1, 0, GPIO_NO_PULL, GPIO_10MA, GPIO_DISABLE);
-
- /* EBI2 BUSY */
- gpio_tlmm_config(39, 1, 0, GPIO_PULL_UP, GPIO_10MA, GPIO_DISABLE);
-
- /* EBI2 D7 - D0 */
- gpio_tlmm_config(40, 1, 0, GPIO_KEEPER, GPIO_10MA, GPIO_DISABLE);
- gpio_tlmm_config(41, 1, 0, GPIO_KEEPER, GPIO_10MA, GPIO_DISABLE);
- gpio_tlmm_config(42, 1, 0, GPIO_KEEPER, GPIO_10MA, GPIO_DISABLE);
- gpio_tlmm_config(43, 1, 0, GPIO_KEEPER, GPIO_10MA, GPIO_DISABLE);
- gpio_tlmm_config(44, 1, 0, GPIO_KEEPER, GPIO_10MA, GPIO_DISABLE);
- gpio_tlmm_config(45, 1, 0, GPIO_KEEPER, GPIO_10MA, GPIO_DISABLE);
- gpio_tlmm_config(46, 1, 0, GPIO_KEEPER, GPIO_10MA, GPIO_DISABLE);
- gpio_tlmm_config(47, 1, 0, GPIO_KEEPER, GPIO_10MA, GPIO_DISABLE);
-}
-
-void board_nand_init(void)
-{
- struct ebi2cr_regs *ebi2_regs;
-
- if (board_id() != BOARD_ID_PROTO_0_2_NAND)
- return;
-
- ebi2_regs = (struct ebi2cr_regs *) EBI2CR_BASE;
-
- nand_clock_config();
- configure_nand_gpio();
-
- /* NAND Flash is connected to CS0 */
- clrsetbits_le32(&ebi2_regs->chip_select_cfg0, CS0_CFG_MASK,
- CS0_CFG_SERIAL_FLASH_DEVICE);
-}
diff --git a/src/mainboard/google/gale/mainboard.c b/src/mainboard/google/gale/mainboard.c
index 73c288b80e..9d99a2c963 100644
--- a/src/mainboard/google/gale/mainboard.c
+++ b/src/mainboard/google/gale/mainboard.c
@@ -87,8 +87,6 @@ static void mainboard_init(device_t dev)
setup_usb();
assert_sw_reset();
setup_tpm();
- /* Functionally a 0-cost no-op if NAND is not present */
- board_nand_init();
#if IS_ENABLED(CONFIG_CHROMEOS)
/* Copy WIFI calibration data into CBMEM. */