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authorArthur Heymans <arthur@aheymans.xyz>2019-06-16 23:29:23 +0200
committerPatrick Georgi <pgeorgi@google.com>2019-06-21 09:00:57 +0000
commit6beaef983aee5d886f6f8571855a92d608d98a17 (patch)
tree9c7f858bc7baa36d9e18ed84ea61d742559922c2 /src/mainboard/google
parent4821a0e135ff2d60f552203d2724ae2d44850623 (diff)
downloadcoreboot-6beaef983aee5d886f6f8571855a92d608d98a17.tar.xz
sb/intel/bd82x6x: Set up io_gen_dec in romstage based on devicetree
Set up generic decode ranges based on the devicetree settings. Change-Id: Ie59b8272c69231d6dffccee30b4d3c84a7e83e8f Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33548 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'src/mainboard/google')
-rw-r--r--src/mainboard/google/butterfly/romstage.c7
-rw-r--r--src/mainboard/google/link/romstage.c16
-rw-r--r--src/mainboard/google/parrot/romstage.c6
-rw-r--r--src/mainboard/google/stout/romstage.c3
4 files changed, 0 insertions, 32 deletions
diff --git a/src/mainboard/google/butterfly/romstage.c b/src/mainboard/google/butterfly/romstage.c
index d34b1e4574..844f754cfc 100644
--- a/src/mainboard/google/butterfly/romstage.c
+++ b/src/mainboard/google/butterfly/romstage.c
@@ -33,13 +33,6 @@ void pch_enable_lpc(void)
/* EC Decode Range Port60/64 and Port62/66 */
/* Enable EC and PS/2 Keyboard/Mouse*/
pci_write_config16(PCH_LPC_DEV, LPC_EN, KBC_LPC_EN | MC_LPC_EN);
-
- /* EC Decode Range Port68/6C */
- pci_write_config32(PCH_LPC_DEV, LPC_GEN1_DEC, (0x68 & ~3) | 0x40001);
-
- /* EC Decode Range Port 380-387 */
- pci_write_config32(PCH_LPC_DEV, LPC_GEN2_DEC, 0x380 | 0x40001);
-
}
void mainboard_rcba_config(void)
diff --git a/src/mainboard/google/link/romstage.c b/src/mainboard/google/link/romstage.c
index 8da13080b3..2f3f07cdce 100644
--- a/src/mainboard/google/link/romstage.c
+++ b/src/mainboard/google/link/romstage.c
@@ -34,28 +34,12 @@
void pch_enable_lpc(void)
{
- const struct device *lpc;
- const struct southbridge_intel_bd82x6x_config *config = NULL;
-
- lpc = pcidev_on_root(0x1f, 0);
- if (!lpc)
- return;
- if (lpc->chip_info)
- config = lpc->chip_info;
- if (!config)
- return;
-
/* Set COM1/COM2 decode range */
pci_write_config16(PCH_LPC_DEV, LPC_IO_DEC, 0x0010);
/* Enable PS/2 Keyboard/Mouse, EC areas and COM1 */
pci_write_config16(PCH_LPC_DEV, LPC_EN, KBC_LPC_EN | MC_LPC_EN | \
GAMEL_LPC_EN | COMA_LPC_EN);
-
- pci_write_config32(PCH_LPC_DEV, LPC_GEN1_DEC, config->gen1_dec);
- pci_write_config32(PCH_LPC_DEV, LPC_GEN2_DEC, config->gen2_dec);
- pci_write_config32(PCH_LPC_DEV, LPC_GEN3_DEC, config->gen3_dec);
- pci_write_config32(PCH_LPC_DEV, LPC_GEN4_DEC, config->gen4_dec);
}
void mainboard_rcba_config(void)
diff --git a/src/mainboard/google/parrot/romstage.c b/src/mainboard/google/parrot/romstage.c
index 76a4b4b677..ac06fbc83e 100644
--- a/src/mainboard/google/parrot/romstage.c
+++ b/src/mainboard/google/parrot/romstage.c
@@ -31,12 +31,6 @@ void pch_enable_lpc(void)
/* Parrot EC Decode Range Port60/64, Port62/66 */
/* Enable EC, PS/2 Keyboard/Mouse */
pci_write_config16(PCH_LPC_DEV, LPC_EN, KBC_LPC_EN | MC_LPC_EN);
-
- /* Map EC_IO decode to the LPC bus */
- pci_write_config32(PCH_LPC_DEV, LPC_GEN1_DEC, (EC_IO & ~3) | 0x00040001);
-
- /* Map EC registers 68/6C decode to the LPC bus */
- pci_write_config32(PCH_LPC_DEV, LPC_GEN2_DEC, (68 & ~3) | 0x00040001);
}
void mainboard_rcba_config(void)
diff --git a/src/mainboard/google/stout/romstage.c b/src/mainboard/google/stout/romstage.c
index 7539dd7f51..6690c6863c 100644
--- a/src/mainboard/google/stout/romstage.c
+++ b/src/mainboard/google/stout/romstage.c
@@ -41,9 +41,6 @@ void pch_enable_lpc(void)
*/
pci_write_config16(PCH_LPC_DEV, LPC_EN, KBC_LPC_EN | MC_LPC_EN |
CNF1_LPC_EN | FDD_LPC_EN);
-
- /* Stout EC Decode Range Port68/6C */
- pci_write_config32(PCH_LPC_DEV, LPC_GEN1_DEC, (0x68 | 0x40001));
}
void mainboard_rcba_config(void)