diff options
author | David Hendricks <dhendrix@chromium.org> | 2013-04-12 16:02:44 -0700 |
---|---|---|
committer | Ronald G. Minnich <rminnich@gmail.com> | 2013-04-13 05:12:18 +0200 |
commit | cd4c8c1e0e9049b264bdbe62e9f2192dee8c3d31 (patch) | |
tree | b171985682f7a34b8445fdb7acbbaf1202ccb850 /src/mainboard/google | |
parent | c0b972f60dbd1a3dadfc568b5245c6b0ee6df559 (diff) | |
download | coreboot-cd4c8c1e0e9049b264bdbe62e9f2192dee8c3d31.tar.xz |
exynos5/snow: remove wait_ms arg from dp_controller_init()
This removes the wait_ms argument from the dp_controller_init(). The
only delay involved is a constant 60ms delay that happens if
everything else goes well. This delay is derived from the LCD spec
so there's no reason it should be baked into the controller code.
(This patch also has the side-effect of fixing a bug where we were
delaying on an undefined value for wait_ms).
Change-Id: I03aa19f2ac2f720524fcb7c795e10cc57f0a226e
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: http://review.coreboot.org/3078
Reviewed-by: Gabe Black <gabeblack@chromium.org>
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/mainboard/google')
-rw-r--r-- | src/mainboard/google/snow/ramstage.c | 20 |
1 files changed, 13 insertions, 7 deletions
diff --git a/src/mainboard/google/snow/ramstage.c b/src/mainboard/google/snow/ramstage.c index ad0266b621..962c79b653 100644 --- a/src/mainboard/google/snow/ramstage.c +++ b/src/mainboard/google/snow/ramstage.c @@ -139,6 +139,16 @@ static void exynos_dp_reset(void) udelay(300 * 1000); } +/* + * This delay is T3 in the LCD timing spec (defined as >200ms). We set + * this down to 60ms since that's the approximate maximum amount of time + * it'll take a bridge to start outputting LVDS data. The delay of + * >200ms is just a conservative value to avoid turning on the backlight + * when there's random LCD data on the screen. Shaving 140ms off the + * boot is an acceptable trade-off. + */ +#define LCD_T3_DELAY_MS 60 + #define LCD_T5_DELAY_MS 10 #define LCD_T6_DELAY_MS 10 @@ -199,7 +209,6 @@ static struct video_info snow_dp_video_info = { static void mainboard_init(device_t dev) { int dp_tries; - unsigned int wait_ms; struct s5p_dp_device dp_device = { .base = (struct exynos5_dp *)EXYNOS5250_DP1_BASE, .video_info = &snow_dp_video_info, @@ -215,20 +224,17 @@ static void mainboard_init(device_t dev) exynos_dp_bridge_setup(); for (dp_tries = 1; dp_tries <= SNOW_MAX_DP_TRIES; dp_tries++) { - if (wait_ms) { - udelay(wait_ms); - wait_ms = 0; - } - exynos_dp_bridge_init(); if (exynos_dp_hotplug()) { exynos_dp_reset(); continue; } - if (dp_controller_init(&dp_device, &wait_ms)) + if (dp_controller_init(&dp_device)) continue; + udelay(LCD_T3_DELAY_MS * 1000); + snow_backlight_vdd(); snow_backlight_pwm(); snow_backlight_en(); |