diff options
| author | Ravi Sarawadi <ravishankar.sarawadi@intel.com> | 2018-04-26 14:32:33 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-04-30 06:23:13 +0000 |
| commit | 036aff9e658c9de5b53cb06d20c6bb2e8ad1003a (patch) | |
| tree | f8264e4e337558beb23caca4495f4d73e33ccdb5 /src/mainboard/google | |
| parent | 294446a137aa0477db4c8eb09071b42020e1fe2f (diff) | |
| download | coreboot-036aff9e658c9de5b53cb06d20c6bb2e8ad1003a.tar.xz | |
mb/google/octopus: save dimm info as SMBIOS Table-17
Save FSP provided memory HOB info as SMBIOS Table-17 format.
Firmware tools such as mosys, dmidecode uses SMBIOS Table-17 to
report memory metadata.
BUG=b:78651920
TEST=Build for Octopus and check 'dmidecode -t17' and
'mosys memory spd print all' to verify dimm info.
Change-Id: I9b032b766a2927725b2378f7f720644d4459f602
Signed-off-by: Ravi Sarawadi <ravishankar.sarawadi@intel.com>
Reviewed-on: https://review.coreboot.org/25881
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/mainboard/google')
| -rw-r--r-- | src/mainboard/google/octopus/romstage.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/google/octopus/romstage.c b/src/mainboard/google/octopus/romstage.c index 15c1fd144e..1810c53c27 100644 --- a/src/mainboard/google/octopus/romstage.c +++ b/src/mainboard/google/octopus/romstage.c @@ -26,4 +26,5 @@ void mainboard_memory_init_params(FSPM_UPD *memupd) void mainboard_save_dimm_info(void) { + save_lpddr4_dimm_info(variant_lpddr4_config(), variant_memory_sku()); } |