diff options
| author | Gabe Black <gabeblack@google.com> | 2013-06-28 14:27:16 -0700 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2013-07-10 23:18:38 +0200 |
| commit | c0b2144f698fdf82a2402db6b6038e70b19ba984 (patch) | |
| tree | f8447dcdcb75e9b4fc5f1a44a0354231f324b623 /src/mainboard/google | |
| parent | 9f96aa6b5e6bc5af8feb7bb29239f8421ded1f14 (diff) | |
| download | coreboot-c0b2144f698fdf82a2402db6b6038e70b19ba984.tar.xz | |
pit: Replace the tps65090 functions and adjust the hotplug detect line.
The functions which manipulated the tps65090 were removed a while ago because
it isn't accessible directly from the AP, it's on an I2C bus that has to be
accessed by the EC on our behalf. Now that that capability has been added, we
can rewrite the small portion of the the tps65090 we actually used but using
the EC passthrough commands.
Also, we should not be configuring the hardware display port hotplug detect
line since we're using it as a GPIO for other purposes. The GPIO we're using
instead defaults to being an input, but to be safe we should probably
explicitly configure it as one anyway.
Change-Id: I7f8a8a767e3cccb813513940a5feceea482982f5
Signed-off-by: Gabe Black <gabeblack@chromium.org>
Reviewed-on: http://review.coreboot.org/3717
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/google')
| -rw-r--r-- | src/mainboard/google/pit/mainboard.c | 39 |
1 files changed, 35 insertions, 4 deletions
diff --git a/src/mainboard/google/pit/mainboard.c b/src/mainboard/google/pit/mainboard.c index 64783ad803..67d3b5d0ab 100644 --- a/src/mainboard/google/pit/mainboard.c +++ b/src/mainboard/google/pit/mainboard.c @@ -34,6 +34,7 @@ #include <cpu/samsung/exynos5420/power.h> #include <cpu/samsung/exynos5420/i2c.h> #include <cpu/samsung/exynos5420/dp-core.h> +#include <ec/google/chromeec/ec.h> #include "exynos5420.h" @@ -57,8 +58,6 @@ static enum exynos5_gpio_pin bl_en = GPIO_X22; /* active high */ static void exynos_dp_bridge_setup(void) { - exynos_pinmux_dphpd(); - gpio_set_value(dp_pd_l, 1); gpio_cfg_pin(dp_pd_l, GPIO_OUTPUT); gpio_set_pull(dp_pd_l, GPIO_PULL_NONE); @@ -68,6 +67,8 @@ static void exynos_dp_bridge_setup(void) gpio_set_pull(dp_rst_l, GPIO_PULL_NONE); udelay(10); gpio_set_value(dp_rst_l, 1); + + gpio_cfg_pin(dp_hpd, GPIO_INPUT); } static void exynos_dp_bridge_init(void) @@ -170,6 +171,35 @@ static void gpio_init(void) exynos_pinmux_i2c10(); } +enum { + FET_CTRL_WAIT = 3 << 2, + FET_CTRL_ADENFET = 1 << 1, + FET_CTRL_ENFET = 1 << 0 +}; + +static void tps65090_thru_ec_fet_set(int index) +{ + uint8_t value = FET_CTRL_ADENFET | FET_CTRL_WAIT | FET_CTRL_ENFET; + + if (google_chromeec_i2c_xfer(0x48, 0xe + index, 1, &value, 1, 0)) { + printk(BIOS_ERR, + "Error sending i2c pass through command to EC.\n"); + return; + } +} + +static void lcd_vdd(void) +{ + /* Enable FET6, lcd panel */ + tps65090_thru_ec_fet_set(6); +} + +static void backlight_vdd(void) +{ + /* Enable FET1, backlight */ + tps65090_thru_ec_fet_set(1); +} + /* this happens after cpu_init where exynos resources are set */ static void mainboard_init(device_t dev) { @@ -193,7 +223,7 @@ static void mainboard_init(device_t dev) fb_addr = cbmem_find(CBMEM_ID_CONSOLE); set_vbe_mode_info_valid(&edid, (uintptr_t)fb_addr); - // XXX Turn on the LCD power here. + lcd_vdd(); // FIXME: should timeout do { @@ -204,6 +234,7 @@ static void mainboard_init(device_t dev) for (dp_tries = 1; dp_tries <= MAX_DP_TRIES; dp_tries++) { exynos_dp_bridge_init(); if (exynos_dp_hotplug()) { + printk(BIOS_ERR, "Hotplug detect failed.\n"); exynos_dp_reset(); continue; } @@ -213,7 +244,7 @@ static void mainboard_init(device_t dev) udelay(LCD_T3_DELAY_MS * 1000); - // XXX Turn on the backlight power here. + backlight_vdd(); backlight_pwm(); backlight_en(); /* if we're here, we're successful */ |