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authorJulius Werner <jwerner@chromium.org>2013-11-13 18:22:15 -0800
committerIsaac Christensen <isaac.christensen@se-eng.com>2014-09-13 02:21:02 +0200
commit85620db107d587a8341987162d403f4b7aee9a81 (patch)
treea3d204806838081f351f164a25f5872697130f42 /src/mainboard/google
parent813f305e26755aba6826c0f5baf60a65cafbefd6 (diff)
downloadcoreboot-85620db107d587a8341987162d403f4b7aee9a81.tar.xz
arm: Move exception_init() close to console_init()
This patch adds stub implementations of exception_init() to all archs so that it can be called from src/lib/hardwaremain.c. It also moves/adds all other invocations of exception_init() (which needs to be rerun in every stage) close to console_init(), in the hopes that it will be less likely overlooked when creating future boards. Also added (an ineffective) one to the armv4 bootblock implementations for consistency and in case we want to implement it later. Change-Id: Iecad10172d25f6c1fc54b0fec8165d7ef60e3414 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/176764 Reviewed-by: Gabe Black <gabeblack@chromium.org> Reviewed-by: David Hendricks <dhendrix@chromium.org> (cherry picked from commit 2960623f4a59d841a13793ee906db8d1b1c16c5d) Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com> Reviewed-on: http://review.coreboot.org/6884 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/mainboard/google')
-rw-r--r--src/mainboard/google/nyan/romstage.c3
-rw-r--r--src/mainboard/google/pit/mainboard.c5
-rw-r--r--src/mainboard/google/pit/romstage.c2
-rw-r--r--src/mainboard/google/snow/mainboard.c5
-rw-r--r--src/mainboard/google/snow/romstage.c2
5 files changed, 5 insertions, 12 deletions
diff --git a/src/mainboard/google/nyan/romstage.c b/src/mainboard/google/nyan/romstage.c
index e7895566f9..ea40388823 100644
--- a/src/mainboard/google/nyan/romstage.c
+++ b/src/mainboard/google/nyan/romstage.c
@@ -95,6 +95,7 @@ void main(void)
configure_l2actlr();
console_init();
+ exception_init();
mmu_init();
mmu_config_range(0, DRAM_START, DCACHE_OFF);
@@ -106,8 +107,6 @@ void main(void)
dcache_invalidate_all();
dcache_mmu_enable();
- exception_init();
-
/* For quality of the user experience, it's important to get
* the video going ASAP. Because there are long delays in some
* of the powerup steps, we do some very early setup here in
diff --git a/src/mainboard/google/pit/mainboard.c b/src/mainboard/google/pit/mainboard.c
index c0650d8542..c07db7b85f 100644
--- a/src/mainboard/google/pit/mainboard.c
+++ b/src/mainboard/google/pit/mainboard.c
@@ -27,7 +27,6 @@
#include <vbe.h>
#include <boot/coreboot_tables.h>
#include <arch/cache.h>
-#include <arch/exception.h>
#include <soc/samsung/exynos5420/tmu.h>
#include <soc/samsung/exynos5420/clk.h>
#include <soc/samsung/exynos5420/cpu.h>
@@ -472,10 +471,6 @@ static void mainboard_enable(device_t dev)
mmu_config_range(DMA_START >> 20, DMA_SIZE >> 20, DCACHE_OFF);
tlb_invalidate_all();
- /* this is going to move, but we must have it now and we're
- * not sure where */
- exception_init();
-
const unsigned epll_hz = 192000000;
const unsigned sample_rate = 48000;
const unsigned lr_frame_size = 256;
diff --git a/src/mainboard/google/pit/romstage.c b/src/mainboard/google/pit/romstage.c
index 1393ba8a8a..16dc997e75 100644
--- a/src/mainboard/google/pit/romstage.c
+++ b/src/mainboard/google/pit/romstage.c
@@ -25,6 +25,7 @@
#include <cbmem.h>
#include <arch/cache.h>
+#include <arch/exception.h>
#include <soc/samsung/exynos5420/i2c.h>
#include <soc/samsung/exynos5420/clk.h>
#include <soc/samsung/exynos5420/cpu.h>
@@ -242,6 +243,7 @@ void main(void)
exynos_pinmux_uart3();
console_init();
+ exception_init();
if (power_init_failed)
die("Failed to intialize power.\n");
diff --git a/src/mainboard/google/snow/mainboard.c b/src/mainboard/google/snow/mainboard.c
index 99a4e30a79..0b6cf4ae83 100644
--- a/src/mainboard/google/snow/mainboard.c
+++ b/src/mainboard/google/snow/mainboard.c
@@ -27,7 +27,6 @@
#include <vbe.h>
#include <boot/coreboot_tables.h>
#include <arch/cache.h>
-#include <arch/exception.h>
#include <soc/samsung/exynos5250/tmu.h>
#include <soc/samsung/exynos5250/clk.h>
#include <soc/samsung/exynos5250/gpio.h>
@@ -338,10 +337,6 @@ static void mainboard_enable(device_t dev)
dcache_invalidate_all();
dcache_mmu_enable();
- /* this is going to move, but we must have it now and we're
- * not sure where */
- exception_init();
-
const unsigned epll_hz = 192000000;
const unsigned sample_rate = 48000;
const unsigned lr_frame_size = 256;
diff --git a/src/mainboard/google/snow/romstage.c b/src/mainboard/google/snow/romstage.c
index ac469ba41b..9b35c4a6d4 100644
--- a/src/mainboard/google/snow/romstage.c
+++ b/src/mainboard/google/snow/romstage.c
@@ -24,6 +24,7 @@
#include <cbmem.h>
#include <arch/cache.h>
+#include <arch/exception.h>
#include <soc/samsung/exynos5250/i2c.h>
#include <soc/samsung/exynos5250/clk.h>
#include <soc/samsung/exynos5250/cpu.h>
@@ -151,6 +152,7 @@ void main(void)
mem = setup_clock();
console_init();
+ exception_init();
setup_power(is_resume);
setup_memory(mem, is_resume);