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authorDuncan Laurie <dlaurie@chromium.org>2014-06-02 08:36:38 -0700
committerMarc Jones <marc.jones@se-eng.com>2015-01-04 00:04:15 +0100
commit502c38f9df25bfaf650271d93ea90069a1d0ccd6 (patch)
tree0a27a61dc62d5c50fa8af9b68ad0f8e5e0bfdbc7 /src/mainboard/google
parent25c6f75bb29fceba7a30d170f2401241fc3428ed (diff)
downloadcoreboot-502c38f9df25bfaf650271d93ea90069a1d0ccd6.tar.xz
samus: Enable DDI2 hotplug
Both DDI ports may be used on this board so it needs to be able to detect a device on either port. BUG=chrome-os-partner:28234 TEST=None (needs hardware) Original-Change-Id: I5fc5ec3fe887fb51e7bdeae43c8297580e0ba6d6 Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/202358 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> (cherry picked from commit 574bb6ac5d33c98f0214d6c738af24172164f4a1) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: I57613fcea10af0fecaf0f2ad6a83ca011c650099 Reviewed-on: http://review.coreboot.org/8046 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/mainboard/google')
-rw-r--r--src/mainboard/google/samus/devicetree.cb6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/mainboard/google/samus/devicetree.cb b/src/mainboard/google/samus/devicetree.cb
index 8810c473e3..ce13a1daf2 100644
--- a/src/mainboard/google/samus/devicetree.cb
+++ b/src/mainboard/google/samus/devicetree.cb
@@ -3,12 +3,12 @@ chip soc/intel/broadwell
# Enable eDP Hotplug with 6ms pulse
register "gpu_dp_d_hotplug" = "0x06"
- # Disable DDI2 Hotplug
- register "gpu_dp_c_hotplug" = "0x00"
-
# Enable DDI1 Hotplug with 6ms pulse
register "gpu_dp_b_hotplug" = "0x06"
+ # Enable DDI2 Hotplug with 6ms pulse
+ register "gpu_dp_c_hotplug" = "0x06"
+
# Set backlight PWM values for eDP
register "gpu_cpu_backlight" = "0x00000200"
register "gpu_pch_backlight" = "0x04000000"