diff options
| author | Aaron Durbin <adurbin@chromium.org> | 2016-11-11 17:28:35 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-11-17 18:46:58 +0100 |
| commit | a20e9832362db1b2031d62df05620d1ae03f18fc (patch) | |
| tree | 5c149899194486928a2b1cb4e7ef1da6b7039c94 /src/mainboard/google | |
| parent | 96831e69a0fe175b148aa0d4f3e5fcc0db1da6d3 (diff) | |
| download | coreboot-a20e9832362db1b2031d62df05620d1ae03f18fc.tar.xz | |
mainboard/google/reef: set i2c bus timings by rise/fall times
Provide the rise and fall times for the i2c buses and let the
library perform the necessary calculations for the i2c
controller registers instead of manually tuning the values.
BUG=chrome-os-partner:58889,chrome-os-partner:59565
Change-Id: I0c84658471d90309cdbb850e3128ae01780633af
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/17397
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/mainboard/google')
| -rw-r--r-- | src/mainboard/google/reef/variants/baseboard/devicetree.cb | 45 |
1 files changed, 23 insertions, 22 deletions
diff --git a/src/mainboard/google/reef/variants/baseboard/devicetree.cb b/src/mainboard/google/reef/variants/baseboard/devicetree.cb index 278cc576b7..263255f328 100644 --- a/src/mainboard/google/reef/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/reef/variants/baseboard/devicetree.cb @@ -71,39 +71,40 @@ chip soc/intel/apollolake register "gpe0_dw2" = "PMC_GPE_N_63_32" register "gpe0_dw3" = "PMC_GPE_SW_31_0" - # Enable I2C2 bus early for TPM access and configure as 400kHz - # with manually tuned values. + # Enable I2C0 for audio codec at 400kHz + register "i2c[0]" = "{ + .speed = I2C_SPEED_FAST, + .rise_time_ns = 104, + .fall_time_ns = 52, + }" + + # Enable I2C2 bus early for TPM at 400kHz register "i2c[2]" = "{ .early_init = 1, .speed = I2C_SPEED_FAST, - .speed_config[0] = { - .speed = I2C_SPEED_FAST, - .scl_lcnt = 0xd0, - .scl_hcnt = 0x68, - .sda_hold = 0x27, - } + .rise_time_ns = 57, + .fall_time_ns = 28, + }" + + # touchscreen at 400kHz + register "i2c[3]" = "{ + .speed = I2C_SPEED_FAST, + .rise_time_ns = 76, + .fall_time_ns = 164, }" - # Limit trackpad speed to 400kHz with manually tuned values. + # trackpad at 400kHz register "i2c[4]" = "{ .speed = I2C_SPEED_FAST, - .speed_config[0] = { - .speed = I2C_SPEED_FAST, - .scl_lcnt = 0xd0, - .scl_hcnt = 0x68, - .sda_hold = 0x27, - } + .rise_time_ns = 114, + .fall_time_ns = 164, }" - # Limit digitizer speed to 400kHz with manually tuned values. + # digitizer at 400kHz register "i2c[5]" = "{ .speed = I2C_SPEED_FAST, - .speed_config[0] = { - .speed = I2C_SPEED_FAST, - .scl_lcnt = 0xd0, - .scl_hcnt = 0x68, - .sda_hold = 0x27, - } + .rise_time_ns = 152, + .fall_time_ns = 30, }" # Minimum SLP S3 assertion width 28ms. |