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authorAaron Durbin <adurbin@chromium.org>2015-04-22 10:41:42 -0500
committerPatrick Georgi <pgeorgi@google.com>2015-04-28 16:09:56 +0200
commit1124cec59a2c705a4ef3740dbdf0f68113602d31 (patch)
treee5c519b0539e581c05c9d9f610a1a6deea9cd3a6 /src/mainboard/google
parent6d65f796db04927bfc8324f50ad0816cec9673b6 (diff)
downloadcoreboot-1124cec59a2c705a4ef3740dbdf0f68113602d31.tar.xz
chromeos: remove VBOOT2_VERIFY_FIRMWARE option
There's no need to have the VBOOT2_VERIFY_FIRMWARE distinction because it's the only game in town. Change-Id: I82aab665934c27829e1a04115bf499ae527a91aa Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9958 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/mainboard/google')
-rw-r--r--src/mainboard/google/nyan_blaze/Kconfig3
-rw-r--r--src/mainboard/google/nyan_blaze/romstage.c6
-rw-r--r--src/mainboard/google/rush/memlayout.ld2
-rw-r--r--src/mainboard/google/rush_ryu/memlayout.ld2
4 files changed, 6 insertions, 7 deletions
diff --git a/src/mainboard/google/nyan_blaze/Kconfig b/src/mainboard/google/nyan_blaze/Kconfig
index 54e6ef3be7..3b7c555f58 100644
--- a/src/mainboard/google/nyan_blaze/Kconfig
+++ b/src/mainboard/google/nyan_blaze/Kconfig
@@ -85,8 +85,7 @@ config EC_GOOGLE_CHROMEEC_SPI_BUS
config VBOOT_RAMSTAGE_INDEX
hex
- default 0x3 if VBOOT2_VERIFY_FIRMWARE
- default 0x2
+ default 0x3
config FLASHMAP_OFFSET
hex
diff --git a/src/mainboard/google/nyan_blaze/romstage.c b/src/mainboard/google/nyan_blaze/romstage.c
index c9510d627e..12b2ffb366 100644
--- a/src/mainboard/google/nyan_blaze/romstage.c
+++ b/src/mainboard/google/nyan_blaze/romstage.c
@@ -58,7 +58,7 @@ static void __attribute__((noinline)) romstage(void)
u32 dram_end_mb = sdram_max_addressable_mb();
u32 dram_size_mb = dram_end_mb - dram_start_mb;
-#if !CONFIG_VBOOT2_VERIFY_FIRMWARE
+#if !CONFIG_VBOOT_VERIFY_FIRMWARE
configure_l2_cache();
mmu_init();
/* Device memory below DRAM is uncached. */
@@ -95,7 +95,7 @@ static void __attribute__((noinline)) romstage(void)
early_mainboard_init();
-#if CONFIG_VBOOT2_VERIFY_FIRMWARE
+#if CONFIG_VBOOT_VERIFY_FIRMWARE
entry = vboot2_load_ramstage();
#else
early_mainboard_init();
@@ -108,7 +108,7 @@ static void __attribute__((noinline)) romstage(void)
/* Stub to force arm_init_caches to the top, before any stack/memory accesses */
void main(void)
{
-#if !CONFIG_VBOOT2_VERIFY_FIRMWARE
+#if !CONFIG_VBOOT_VERIFY_FIRMWARE
asm volatile ("bl arm_init_caches"
::: "r0","r1","r2","r3","r4","r5","ip");
#endif
diff --git a/src/mainboard/google/rush/memlayout.ld b/src/mainboard/google/rush/memlayout.ld
index d8fdb9a94b..367a88e48e 100644
--- a/src/mainboard/google/rush/memlayout.ld
+++ b/src/mainboard/google/rush/memlayout.ld
@@ -1,4 +1,4 @@
-#if IS_ENABLED(CONFIG_VBOOT2_VERIFY_FIRMWARE)
+#if IS_ENABLED(CONFIG_VBOOT_VERIFY_FIRMWARE)
#include <soc/memlayout_vboot2.ld>
#else
#include <soc/memlayout.ld>
diff --git a/src/mainboard/google/rush_ryu/memlayout.ld b/src/mainboard/google/rush_ryu/memlayout.ld
index d8fdb9a94b..367a88e48e 100644
--- a/src/mainboard/google/rush_ryu/memlayout.ld
+++ b/src/mainboard/google/rush_ryu/memlayout.ld
@@ -1,4 +1,4 @@
-#if IS_ENABLED(CONFIG_VBOOT2_VERIFY_FIRMWARE)
+#if IS_ENABLED(CONFIG_VBOOT_VERIFY_FIRMWARE)
#include <soc/memlayout_vboot2.ld>
#else
#include <soc/memlayout.ld>