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authorDuncan Laurie <dlaurie@google.com>2019-05-22 10:14:26 -0700
committerDuncan Laurie <dlaurie@chromium.org>2019-05-22 20:01:34 +0000
commit239b13ce38e9f7edd86193a5edddb403cdac437d (patch)
treedf454b816071ca0e0f69a941ce38809ce749151e /src/mainboard/google
parentf41afde6c2bbab86072b6a8cc23f91cdcd772a59 (diff)
downloadcoreboot-239b13ce38e9f7edd86193a5edddb403cdac437d.tar.xz
mb/google/sarien: Send post code to the EC
Use the mainboard post code hook to inform the wilco EC driver of the latest boot stage. BUG=b:124401932 BRANCH=sarien TEST=build coreboot for sarien and arcada platforms TEST=Remove DIMM module, confirm diagnostic LED pattern for memory failure (2 amber, 4 white). Change-Id: If5bf69365d8be3bdbd433f305c85848206ded7b0 Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32937 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google')
-rw-r--r--src/mainboard/google/sarien/ramstage.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/mainboard/google/sarien/ramstage.c b/src/mainboard/google/sarien/ramstage.c
index 1d220461cf..e246419373 100644
--- a/src/mainboard/google/sarien/ramstage.c
+++ b/src/mainboard/google/sarien/ramstage.c
@@ -15,6 +15,7 @@
#include <arch/acpi.h>
#include <drivers/vpd/vpd.h>
+#include <ec/google/wilco/commands.h>
#include <smbios.h>
#include <soc/gpio.h>
#include <soc/ramstage.h>
@@ -69,6 +70,11 @@ void mainboard_silicon_init_params(FSP_S_CONFIG *params)
cnl_configure_pads(gpio_table, num_gpios);
}
+void mainboard_post(uint8_t value)
+{
+ wilco_ec_save_post_code(value);
+}
+
static void mainboard_enable(struct device *dev)
{
dev->ops->acpi_inject_dsdt_generator = chromeos_dsdt_generator;