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authorMatt DeVillier <matt.devillier@gmail.com>2018-07-31 17:10:36 -0500
committerPatrick Georgi <pgeorgi@google.com>2018-08-02 10:54:05 +0000
commitc9f0732cf1babb4009b12ac78c1814535493009c (patch)
tree929c0fe87887d8bb4a7c05d3dd0e3d1f2f3d3146 /src/mainboard/google
parent404962f32c8e8a7131d635af50ce0ff186f46247 (diff)
downloadcoreboot-c9f0732cf1babb4009b12ac78c1814535493009c.tar.xz
google/edgar: Add support for additional RAM types/configs
Adapted from chromium commits 2319742 and 3b59fb2 [Edgar: Add Micron MT52L256M32D1PF-107 SPD data] [Edgar: Add Hynix H9CCNNN8GTALAR-NUD and Nanya NT6CL256T32CM-H1 SPD data] Supported 2nd source Hynix, Micron, and Nanya memory. TEST=Built and used mosys command by "mosys -k memory spd print all" Original-Change-Id: Iec9160b74d2812620d2d28f841d503e2d63c8579 Original-Change-Id: I610f01a0198f835a2038511ff78bf0cfba7812a0 Original-Signed-off-by: Hank2_Lin <Hank2_Lin@pegatroncorp.com> Original-Reviewed-by: Vincent Wang <vwang@chromium.org> Original-Reviewed-by: YH Lin <yueherngl@chromium.org> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Change-Id: If2379d6e58425616f49d77b0cdea1cd90f9a8bfa Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/27763 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/mainboard/google')
-rw-r--r--src/mainboard/google/cyan/spd/nanya_dimm_NT6CL256T32CM-H1.spd.hex16
-rw-r--r--src/mainboard/google/cyan/variants/edgar/Makefile.inc7
-rw-r--r--src/mainboard/google/cyan/variants/edgar/spd_util.c28
3 files changed, 46 insertions, 5 deletions
diff --git a/src/mainboard/google/cyan/spd/nanya_dimm_NT6CL256T32CM-H1.spd.hex b/src/mainboard/google/cyan/spd/nanya_dimm_NT6CL256T32CM-H1.spd.hex
new file mode 100644
index 0000000000..d24c980181
--- /dev/null
+++ b/src/mainboard/google/cyan/spd/nanya_dimm_NT6CL256T32CM-H1.spd.hex
@@ -0,0 +1,16 @@
+91 20 F1 00 04 11 05 0B 03 11 01 08 09 00 40 05
+67 78 90 50 90 11 50 E0 10 04 3C 3C 01 90 00 00
+00 A0 CA E6 00 00 00 A8 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 1F 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 83 0B 00 00 00 00 00 00 00 63 4D
+4E 54 36 43 4C 32 35 36 54 33 32 43 4D 2D 48 31
+20 20 00 00 83 0B 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
diff --git a/src/mainboard/google/cyan/variants/edgar/Makefile.inc b/src/mainboard/google/cyan/variants/edgar/Makefile.inc
index e553c885d9..2e8b02c64e 100644
--- a/src/mainboard/google/cyan/variants/edgar/Makefile.inc
+++ b/src/mainboard/google/cyan/variants/edgar/Makefile.inc
@@ -25,8 +25,13 @@ SPD_SOURCES += hynix_dimm_H9CCNNN8JTBLAR-NUD
SPD_SOURCES += samsung_dimm_K4E8E304EE-EGCE
SPD_SOURCES += hynix_dimm_H9CCNNN8JTBLAR-NUD
SPD_SOURCES += samsung_dimm_K4E8E324EB-EGCF
-SPD_SOURCES += empty
+SPD_SOURCES += micron_dimm_MT52L256M32D1PF-107
SPD_SOURCES += samsung_dimm_K4E8E324EB-EGCF
+SPD_SOURCES += micron_dimm_MT52L256M32D1PF-107
+SPD_SOURCES += nanya_dimm_NT6CL256T32CM-H1
+SPD_SOURCES += hynix_dimm_H9CCNNN8GTALAR-NUD
+SPD_SOURCES += nanya_dimm_NT6CL256T32CM-H1
+SPD_SOURCES += hynix_dimm_H9CCNNN8GTALAR-NUD
SPD_DEPS := $(foreach f, $(SPD_SOURCES), src/mainboard/$(MAINBOARDDIR)/spd/$(f).spd.hex)
diff --git a/src/mainboard/google/cyan/variants/edgar/spd_util.c b/src/mainboard/google/cyan/variants/edgar/spd_util.c
index 9651c27d17..f9b368117b 100644
--- a/src/mainboard/google/cyan/variants/edgar/spd_util.c
+++ b/src/mainboard/google/cyan/variants/edgar/spd_util.c
@@ -23,9 +23,14 @@
* 0b0001 - 4GiB total - 2 x 2GiB Hynix H9CCNNN8JTBLAR-NUD
* 0b0010 - 2GiB total - 1 x 2GiB Samsung K4E8E304EE-EGCE
* 0b0011 - 2GiB total - 1 x 2GiB Hynix H9CCNNN8JTBLAR-NUD
- * 0b0100 - 4GiB total - 2 x 2GiB Samsung K4E8E324EB-EGCF
- * 0b0101 - TBD
- * 0b0110 - 2GiB total - 1 x 2GiB Samsung K4E8E324EB-EGCF
+ * 0b0100 - 8GiB total - 2 x 4GiB Samsung K4E8E324EB-EGCF (dual)
+ * 0b0101 - 4GiB total - 2 x 2GiB Micron LPDDR3 MT52L256M32D1PF-107 (dual)
+ * 0b0110 - 4GiB total - 1 x 4GiB Samsung K4E8E324EB-EGCF
+ * 0b0111 - 2GiB total - 1 x 2GiB Micron LPDDR3 MT52L256M32D1PF-107
+ * 0b1000 - 4GiB total - 2 x 2GiB NANYA NT6CL256T32CM-H1 (dual)
+ * 0b1001 - 4GiB total - 2 x 2GiB Hynix H9CCNNN8GTALAR-NUD (dual)
+ * 0b1010 - 2GiB total - 1 x 2GiB NANYA NT6CL256T32CM-H1
+ * 0b1011 - 2GiB total - 1 x 2GiB Hynix H9CCNNN8GTALAR-NUD
*/
int get_variant_spd_index(int ram_id, int *dual)
@@ -52,11 +57,26 @@ int get_variant_spd_index(int ram_id, int *dual)
printk(BIOS_DEBUG, "4GiB Samsung K4E8E324EB-EGCF\n");
break;
case 5:
- printk(BIOS_DEBUG, "empty\n");
+ printk(BIOS_DEBUG, "4GiB Micron LPDDR3 MT52L256M32D1PF-107\n");
break;
case 6:
printk(BIOS_DEBUG, "2GiB Samsung K4E8E324EB-EGCF\n");
break;
+ case 7:
+ printk(BIOS_DEBUG, "2GiB Micron LPDDR3 MT52L256M32D1PF-107\n");
+ break;
+ case 8:
+ printk(BIOS_DEBUG, "4GiB NANYA NT6CL256T32CM-H1\n");
+ break;
+ case 9:
+ printk(BIOS_DEBUG, "4GiB Hynix H9CCNNN8GTALAR-NUD\n");
+ break;
+ case 10:
+ printk(BIOS_DEBUG, "2GiB NANYA NT6CL256T32CM-H1\n");
+ break;
+ case 11:
+ printk(BIOS_DEBUG, "2GiB Hynix H9CCNNN8GTALAR-NUD\n");
+ break;
}
/* 1:1 mapping between ram_id and spd_index for edgar */