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authorEric Lai <ericr_lai@compal.corp-partner.google.com>2020-04-17 19:24:00 +0800
committerPatrick Georgi <pgeorgi@google.com>2020-04-20 06:54:45 +0000
commitfb8823ddaa5badd3a7575b48cb8b8aec1016f2a7 (patch)
treee7223bf38559cf51a60fea89e742bcb0d54fe781 /src/mainboard/google
parent7691ebc379bd3d1ca0f92bd25db974ec7dfff4b3 (diff)
downloadcoreboot-fb8823ddaa5badd3a7575b48cb8b8aec1016f2a7.tar.xz
mb/google/deltaur: Add memory topology SODIMM and MEMORYDOWN
Update memory topology for spd info. Deltan supports SODIMM and Deltaur supports MEMORYDOWN. BUG=b:151702387 Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com> Change-Id: If314894325d6f222807030a36f8c4cefecfe5bd3 Reviewed-on: https://review.coreboot.org/c/coreboot/+/40486 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/mainboard/google')
-rw-r--r--src/mainboard/google/deltaur/variants/deltan/memory.c1
-rw-r--r--src/mainboard/google/deltaur/variants/deltaur/memory.c1
2 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/google/deltaur/variants/deltan/memory.c b/src/mainboard/google/deltaur/variants/deltan/memory.c
index 90fa642c04..d51ba70431 100644
--- a/src/mainboard/google/deltaur/variants/deltan/memory.c
+++ b/src/mainboard/google/deltaur/variants/deltan/memory.c
@@ -47,6 +47,7 @@ static const struct mb_ddr4_cfg baseboard_memcfg = {
void variant_memory_init(FSP_M_CONFIG *mem_cfg)
{
const struct spd_info spd_info = {
+ .topology = SODIMM,
.smbus_info[0] = {.addr_dimm0 = 0xa0,
.addr_dimm1 = 0 },
.smbus_info[1] = {.addr_dimm0 = 0xa4,
diff --git a/src/mainboard/google/deltaur/variants/deltaur/memory.c b/src/mainboard/google/deltaur/variants/deltaur/memory.c
index c2df46703c..c25df392b7 100644
--- a/src/mainboard/google/deltaur/variants/deltaur/memory.c
+++ b/src/mainboard/google/deltaur/variants/deltaur/memory.c
@@ -83,6 +83,7 @@ void variant_memory_init(FSP_M_CONFIG *mem_cfg)
{
const struct lpddr4x_cfg *board_cfg = variant_memory_params();
const struct spd_info spd_info = {
+ .topology = MEMORY_DOWN,
.md_spd_loc = SPD_CBFS,
.cbfs_index = variant_memory_sku(),
};