diff options
| author | Tristan Shieh <tristan.shieh@mediatek.com> | 2018-09-13 19:28:15 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-09-21 07:08:36 +0000 |
| commit | 1f64e6aa85b0560b0cbc8b7f08970efa56d27d3a (patch) | |
| tree | a2fa71c22f6cccb033adb935f57281a409a86c13 /src/mainboard/google | |
| parent | d1d3e62f92cb918d678763d4f990f6badf65caa3 (diff) | |
| download | coreboot-1f64e6aa85b0560b0cbc8b7f08970efa56d27d3a.tar.xz | |
google/kukui: Set up EC_IN_RW GPIO for ChromeOS
Set up EC_IN_RW GPIO to boot depthcharge. Without this patch,
depthcharge will fail to tell if the EC firmware is RW.
BUG=b:80501386
BRANCH=none
TEST=Boots correctly on Kukui and see in logs, that depthcharge detects
EC_IN_RW GPIO.
Change-Id: Icb39d663f65b72e0ad54059c9590d9693106ee25
Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com>
Reviewed-on: https://review.coreboot.org/28670
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google')
| -rw-r--r-- | src/mainboard/google/kukui/chromeos.c | 2 | ||||
| -rw-r--r-- | src/mainboard/google/kukui/gpio.h | 3 |
2 files changed, 4 insertions, 1 deletions
diff --git a/src/mainboard/google/kukui/chromeos.c b/src/mainboard/google/kukui/chromeos.c index 9184d8835d..bb14b1cc70 100644 --- a/src/mainboard/google/kukui/chromeos.c +++ b/src/mainboard/google/kukui/chromeos.c @@ -21,12 +21,14 @@ void setup_chromeos_gpios(void) { + gpio_input_pullup(EC_IN_RW); gpio_input_pullup(EC_IRQ); } void fill_lb_gpios(struct lb_gpios *gpios) { struct lb_gpio chromeos_gpios[] = { + {EC_IN_RW.id, ACTIVE_HIGH, -1, "EC in RW"}, {EC_IRQ.id, ACTIVE_LOW, -1, "EC interrupt"}, }; lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios)); diff --git a/src/mainboard/google/kukui/gpio.h b/src/mainboard/google/kukui/gpio.h index cb9ad24906..a2f77606ac 100644 --- a/src/mainboard/google/kukui/gpio.h +++ b/src/mainboard/google/kukui/gpio.h @@ -18,7 +18,8 @@ #include <soc/gpio.h> -#define EC_IRQ GPIO(PERIPHERAL_EN1) +#define EC_IRQ GPIO(PERIPHERAL_EN1) +#define EC_IN_RW GPIO(PERIPHERAL_EN14) void setup_chromeos_gpios(void); |