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authorAaron Durbin <adurbin@chromium.org>2015-12-08 17:00:23 -0600
committerAaron Durbin <adurbin@chromium.org>2015-12-10 04:43:58 +0100
commit6d720f38e06d14cc8a89635f66dc124dcd5ac150 (patch)
tree874aecaf8f35d8db1740dabc7735e3e44cb9ca5e /src/mainboard/google
parentbf3dbaf86d033becc231a48612d474fac9add1ee (diff)
downloadcoreboot-6d720f38e06d14cc8a89635f66dc124dcd5ac150.tar.xz
cbfs/vboot: remove firmware component support
The Chrome OS verified boot path supported multiple CBFS instances in the boot media as well as stand-alone assets sitting in each vboot RW slot. Remove the support for the stand-alone assets and always use CBFS accesses as the way to retrieve data. This is implemented by adding a cbfs_locator object which is queried for locating the current CBFS. Additionally, it is also signalled prior to when a program is about to be loaded by coreboot for the subsequent stage/payload. This provides the same opportunity as previous for vboot to hook in and perform its logic. BUG=chromium:445938 BRANCH=None TEST=Built and ran on glados. CQ-DEPEND=CL:307121,CL:31691,CL:31690 Change-Id: I6a3a15feb6edd355d6ec252c36b6f7885b383099 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/12689 Tested-by: build bot (Jenkins) Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/google')
-rw-r--r--src/mainboard/google/auron/Kconfig8
-rw-r--r--src/mainboard/google/chell/Kconfig4
-rw-r--r--src/mainboard/google/foster/Kconfig7
-rw-r--r--src/mainboard/google/glados/Kconfig4
-rw-r--r--src/mainboard/google/lars/Kconfig4
-rw-r--r--src/mainboard/google/smaug/Kconfig11
6 files changed, 0 insertions, 38 deletions
diff --git a/src/mainboard/google/auron/Kconfig b/src/mainboard/google/auron/Kconfig
index c5a4ef4026..b812674c2e 100644
--- a/src/mainboard/google/auron/Kconfig
+++ b/src/mainboard/google/auron/Kconfig
@@ -21,14 +21,6 @@ config CHROMEOS
select EC_SOFTWARE_SYNC
select VIRTUAL_DEV_SWITCH
-config VBOOT_RAMSTAGE_INDEX
- hex
- default 0x2
-
-config VBOOT_REFCODE_INDEX
- hex
- default 0x3
-
config MAINBOARD_DIR
string
default google/auron
diff --git a/src/mainboard/google/chell/Kconfig b/src/mainboard/google/chell/Kconfig
index f09198ff8a..5773413a08 100644
--- a/src/mainboard/google/chell/Kconfig
+++ b/src/mainboard/google/chell/Kconfig
@@ -55,8 +55,4 @@ config TPM_PIRQ
hex
default 0x18 # GPP_E0_IRQ
-config VBOOT_RAMSTAGE_INDEX
- hex
- default 0x3
-
endif
diff --git a/src/mainboard/google/foster/Kconfig b/src/mainboard/google/foster/Kconfig
index f843a9ea5b..2ad3552a4c 100644
--- a/src/mainboard/google/foster/Kconfig
+++ b/src/mainboard/google/foster/Kconfig
@@ -76,13 +76,6 @@ config BOOT_MEDIA_SPI_CHIP_SELECT
help
Which chip select to use for boot media.
-# For foster, we are using vboot2. Thus, index for stages:
-# VBOOT_ROMSTAGE_INDEX -> Use default value of 0x2
-# VBOOT_RAMSTAGE_INDEX -> Use 0x3
-config VBOOT_RAMSTAGE_INDEX
- hex
- default 0x3
-
config DRIVER_TPM_I2C_BUS
hex
default 0x2
diff --git a/src/mainboard/google/glados/Kconfig b/src/mainboard/google/glados/Kconfig
index 029aa1b89b..1bea9fda59 100644
--- a/src/mainboard/google/glados/Kconfig
+++ b/src/mainboard/google/glados/Kconfig
@@ -55,8 +55,4 @@ config TPM_PIRQ
hex
default 0x18 # GPP_E0_IRQ
-config VBOOT_RAMSTAGE_INDEX
- hex
- default 0x3
-
endif
diff --git a/src/mainboard/google/lars/Kconfig b/src/mainboard/google/lars/Kconfig
index 70e6726a3a..58391ae59b 100644
--- a/src/mainboard/google/lars/Kconfig
+++ b/src/mainboard/google/lars/Kconfig
@@ -50,8 +50,4 @@ config MAX_CPUS
int
default 8
-config VBOOT_RAMSTAGE_INDEX
- hex
- default 0x3
-
endif
diff --git a/src/mainboard/google/smaug/Kconfig b/src/mainboard/google/smaug/Kconfig
index 576a2f8db3..a23a0d33d7 100644
--- a/src/mainboard/google/smaug/Kconfig
+++ b/src/mainboard/google/smaug/Kconfig
@@ -83,17 +83,6 @@ config BOOT_MEDIA_SPI_CHIP_SELECT
help
Which chip select to use for boot media.
-# For smaug, we are using vboot2. Thus, index for stages:
-# VBOOT_ROMSTAGE_INDEX -> Use default value of 0x2
-# VBOOT_RAMSTAGE_INDEX -> Use 0x3
-config VBOOT_BL31_INDEX
- hex
- default 0x4
-
-config VBOOT_RAMSTAGE_INDEX
- hex
- default 0x3
-
config DRIVER_TPM_I2C_BUS
hex
default 0x2