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authorSeunghwan Kim <sh_.kim@samsung.com>2019-11-28 16:35:02 +0900
committerPatrick Georgi <pgeorgi@google.com>2019-12-04 14:08:28 +0000
commitd9105d98b7cf98bec64f53ee1fb786599279b336 (patch)
tree544df38a1db53e65eef0fb06ad8e9ec0867966e6 /src/mainboard/google
parent2f35744e4068ebc3e3bc13cee6b67b48bf2765a4 (diff)
downloadcoreboot-d9105d98b7cf98bec64f53ee1fb786599279b336.tar.xz
mb/google/kohaku: Adjust I2C clock frequency
All serial I2C bus frequencies should not be over 400KHz in kohaku, but the measurement showed frequencies of I2C1 and I2C4 were over 400KHz. (b:144885961) This change adjusts I2C speed settings to limit that frequencies to 400KHz. The new setting values have been from other projects using same I2C components, and verified I2C1 and I2C4 frequencies < 400MHz internally. BUG=b:144885961 BRANCH=firmware-hatch-12672.B TEST=Verified I2C1 and I2C4 frequency not over 400KHz Change-Id: I9614fb39b6e55cb2ce1b0879a9f5204e55002f8d Signed-off-by: Seunghwan Kim <sh_.kim@samsung.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37313 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard/google')
-rw-r--r--src/mainboard/google/hatch/variants/kohaku/overridetree.cb6
1 files changed, 4 insertions, 2 deletions
diff --git a/src/mainboard/google/hatch/variants/kohaku/overridetree.cb b/src/mainboard/google/hatch/variants/kohaku/overridetree.cb
index 55ac071be5..d515ecc44d 100644
--- a/src/mainboard/google/hatch/variants/kohaku/overridetree.cb
+++ b/src/mainboard/google/hatch/variants/kohaku/overridetree.cb
@@ -60,6 +60,8 @@ chip soc/intel/cannonlake
},
.i2c[1] = {
.speed = I2C_SPEED_FAST,
+ .rise_time_ns = 60,
+ .fall_time_ns = 25,
},
.i2c[2] = {
.speed = I2C_SPEED_FAST,
@@ -68,8 +70,8 @@ chip soc/intel/cannonlake
},
.i2c[4] = {
.speed = I2C_SPEED_FAST,
- .rise_time_ns = 100,
- .fall_time_ns = 20,
+ .rise_time_ns = 104,
+ .fall_time_ns = 52,
},
.gspi[0] = {
.speed_mhz = 1,