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authorHsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>2019-07-10 21:31:34 +0800
committerJulius Werner <jwerner@chromium.org>2019-08-21 18:12:15 +0000
commite804695c6a327b7e9d1ac0838dcd818520224f26 (patch)
treee48828c6d07968628ca133890dee5c116ee9140b /src/mainboard/google
parent4c095fc9e91e68ab15d2ff256260acc9fd65dd91 (diff)
downloadcoreboot-e804695c6a327b7e9d1ac0838dcd818520224f26.tar.xz
mediatek/mt8183: add scp voltage initialization
Add scp voltage initialization. BUG=b:135985700 BRANCH=none Test=Boots correctly on Kukui and scp can boot up normally Change-Id: I5afb60af3c14490e20f28f1c089cfca42ddf7fcf Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34205 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com> Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Diffstat (limited to 'src/mainboard/google')
-rw-r--r--src/mainboard/google/kukui/romstage.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/google/kukui/romstage.c b/src/mainboard/google/kukui/romstage.c
index 1465243f07..a86690b6fb 100644
--- a/src/mainboard/google/kukui/romstage.c
+++ b/src/mainboard/google/kukui/romstage.c
@@ -32,6 +32,7 @@ void platform_romstage_main(void)
/* Adjust VSIM2 down to 2.7V because it is shared with IT6505. */
pmic_set_vsim2_cali(2700);
mt_pll_raise_ca53_freq(1989 * MHz);
+ pmic_init_scp_voltage();
rtc_boot();
mt_mem_init(get_sdram_config());
mtk_mmu_after_dram();