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author | Iru Cai <mytbk920423@gmail.com> | 2021-04-24 21:22:10 +0800 |
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committer | Iru Cai <mytbk920423@gmail.com> | 2021-05-21 20:30:32 +0800 |
commit | 35fd3331f471144d40358a85a43529fa5f172075 (patch) | |
tree | d577c4bed65aaa6b55f920149cbe73ed7b612e50 /src/mainboard/hp/820g2/pei_data.c | |
parent | a1a8c2c621a4ae1e093c63e6b1c34b049da5f0b8 (diff) | |
download | coreboot-35fd3331f471144d40358a85a43529fa5f172075.tar.xz |
mb/hp: Add EliteBook 820 G2
It can now boot Arch Linux from SATA and USB.
Change-Id: Id8b3b7f735460c5e76a2dc9ab2d10154e6606ad6
Signed-off-by: Iru Cai <mytbk920423@gmail.com>
Diffstat (limited to 'src/mainboard/hp/820g2/pei_data.c')
-rw-r--r-- | src/mainboard/hp/820g2/pei_data.c | 47 |
1 files changed, 47 insertions, 0 deletions
diff --git a/src/mainboard/hp/820g2/pei_data.c b/src/mainboard/hp/820g2/pei_data.c new file mode 100644 index 0000000000..e5eff38f32 --- /dev/null +++ b/src/mainboard/hp/820g2/pei_data.c @@ -0,0 +1,47 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <soc/pei_data.h> +#include <soc/pei_wrapper.h> + +void mainboard_fill_pei_data(struct pei_data *pei_data) +{ + pei_data->ec_present = 1; + + pei_data->dimm_channel0_disabled = 2; + pei_data->dimm_channel1_disabled = 2; + pei_data->spd_addresses[0] = 0xa0; + pei_data->spd_addresses[2] = 0xa4; + pei_data->dq_pins_interleaved = 0; + + /* FIXME: USB2 ports */ + pei_data_usb2_port(pei_data, 0, 0x0040, 1, USB_OC_PIN_SKIP, + USB_PORT_BACK_PANEL); + /* P2: left side, USB debug */ + pei_data_usb2_port(pei_data, 1, 0x0040, 1, USB_OC_PIN_SKIP, + USB_PORT_BACK_PANEL); + /* P3: right side (Microchip hub) */ + pei_data_usb2_port(pei_data, 2, 0x0040, 1, USB_OC_PIN_SKIP, + USB_PORT_BACK_PANEL); + /* P4: WLAN */ + pei_data_usb2_port(pei_data, 3, 0x0040, 1, USB_OC_PIN_SKIP, + USB_PORT_BACK_PANEL); + /* P5: fingerprint reader */ + pei_data_usb2_port(pei_data, 4, 0x0040, 1, USB_OC_PIN_SKIP, + USB_PORT_BACK_PANEL); + /* P6: WWAN */ + pei_data_usb2_port(pei_data, 5, 0x0040, 1, USB_OC_PIN_SKIP, + USB_PORT_BACK_PANEL); + /* P7: webcam */ + pei_data_usb2_port(pei_data, 6, 0x0040, 1, USB_OC_PIN_SKIP, + USB_PORT_BACK_PANEL); + pei_data_usb2_port(pei_data, 7, 0x0040, 1, USB_OC_PIN_SKIP, + USB_PORT_BACK_PANEL); + + /* FIXME: USB3 ports */ + pei_data_usb3_port(pei_data, 0, 1, USB_OC_PIN_SKIP, 0); + /* P2: left side, USB debug */ + pei_data_usb3_port(pei_data, 1, 1, USB_OC_PIN_SKIP, 0); + /* P3: right side (Microchip hub) */ + pei_data_usb3_port(pei_data, 2, 1, USB_OC_PIN_SKIP, 0); + pei_data_usb3_port(pei_data, 3, 1, USB_OC_PIN_SKIP, 1); +} |