hp/abm: Add new mainboard

The hp/abm board is used in network/server applications.

Notes:
- The hp/abm board is headless and therefore does not define
  CONFIG_GFXUMA, and does not require a video bios.
- The micro USB connector on the board edge is connected to COM4
  (i.e. I/O=2E8h). Coreboot needs to be configured to use Index=3.
- If you are using SeaBIOS it would also need to be configured to
  use the UART at I/O=2E8h.
- This board has been tested with headless installed versions of
  Ubuntu 12.10 and Fedora 19.

Change-Id: I60bde98411c40a184c8d053199bac8d04df8ab07
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/6116
Tested-by: build bot (Jenkins)
Reviewed-by: Dave Frodin <dave.frodin@se-eng.com>

1 files changed, 30 insertions, 52 deletions

diff --git a/src/mainboard/hp/abm/devicetree.cb b/src/mainboard/hp/abm/devicetree.cb
index 6d6875d425..eb18a05c72 100644
--- a/src/mainboard/hp/abm/devicetree.cb
+++ b/src/mainboard/hp/abm/devicetree.cb
@@ -2,6 +2,7 @@
 # This file is part of the coreboot project.
 #
 # Copyright (C) 2013 Advanced Micro Devices, Inc.
+# Copyright (C) 2014 Sage Electronic Engineering, LLC
 #
 # This program is free software; you can redistribute it and/or modify
 # it under the terms of the GNU General Public License as published by
@@ -28,76 +29,55 @@ chip northbridge/amd/agesa/family16kb/root_complex
 		chip northbridge/amd/agesa/family16kb # CPU side of HT root complex
 
 			chip northbridge/amd/agesa/family16kb # PCI side of HT root complex
-				device pci 0.0 on  end # Root Complex
-				device pci 1.0 on  end # Internal Graphics P2P bridge 0x9804
-				device pci 1.1 on  end # Internal Multimedia
-				device pci 2.0 on  end # PCIe Host Bridge
-				device pci 2.1 on  end # x4 PCIe slot
-				device pci 2.2 on  end # mPCIe slot
-				device pci 2.3 on  end # Realtek NIC
-				device pci 2.4 on  end # Edge Connector
-				device pci 2.5 on  end # Edge Connector
+				device pci 0.0 on  end  # Root Complex
+				device pci 1.0 on  end  # Internal Graphics P2P bridge 0x9804
+				device pci 1.1 on  end  # Internal Multimedia
+				device pci 2.0 on  end  # PCIe Host Bridge
+				device pci 2.1 off end  # unused
+				device pci 2.2 on  end  # GPP0: NIC
+				device pci 2.3 on  end  # GPP1: NIC
+				device pci 2.4 off end  # GPP2: unused
+				device pci 2.5 off end  # GPP3: unused
 			end	#chip northbridge/amd/agesa/family16kb
 
 			chip southbridge/amd/agesa/hudson # it is under NB/SB Link, but on the same pci bus
-				device pci 10.0 on  end # XHCI HC0
 				device pci 11.0 on  end # SATA
 				device pci 12.0 on  end # USB
 				device pci 12.2 on  end # USB
 				device pci 13.0 on  end # USB
 				device pci 13.2 on  end # USB
 				device pci 14.0 on      # SM
-					chip drivers/generic/generic #dimm 0-0-0
+					chip drivers/generic/generic    #dimm 0-0-0
 						device i2c 50 on end
 					end
-					chip drivers/generic/generic #dimm 0-0-1
-						device i2c 51 on end
-					end
 				end # SM
-				device pci 14.2 on  end # HDA	0x4383
-				device pci 14.3 on
-					chip superio/winbond/w83627uhg
-						device pnp 2e.0 off end    # FDC
-						device pnp 2e.1 off end    # LPT1
-						device pnp 2e.2 on         # COM1
+				device pci 14.2 off end             # HDA 0x4383
+				device pci 14.3 on                  # LPC 0x439d
+					chip superio/nuvoton/nct5104d
+						device pnp 4e.0  off end    # FDC
+						device pnp 4e.2  on         # COM1
 							io 0x60 = 0x3f8
 							irq 0x70 = 4
 						end
-						device pnp 2e.3 on         # COM2
+						device pnp 4e.3  on         # COM2
 							io 0x60 = 0x2f8
 							irq 0x70 = 3
 						end
-						device pnp 2e.5 on         # KEYBRD
-							io 0x60 = 0x60
-							io 0x62 = 0x64
-							irq 0x70 = 1
-							irq 0x72 = 12
-						end
-						device pnp 2e.6 on         # COM3
-							io 0x60 = 0x3e8
-							irq 0x70 = 4
-						end
-						device pnp 2e.7 off end    # GPIO
-						device pnp 2e.8 off end    # WDT
-						device pnp 2e.9 off end    # GPIO
-						device pnp 2e.a off end    # ACPI
-						device pnp 2e.b off end    # HWMON
-						device pnp 2e.c off end    # PECI
-						device pnp 2e.d on         # COM4
+						device pnp 4e.7  off end    # GPIO
+						device pnp 4e.8  off end    # GPIO/WDT
+						device pnp 4e.f  off end    # GPIO
+						device pnp 4e.10 off end    # COM3 used by port 80
+						device pnp 4e.11 on         # COM4
 							io 0x60 = 0x2e8
 							irq 0x70 = 3
 						end
-						device pnp 2e.e on         # COM5
-							io 0x60 = 0x3e0
-							irq 0x70 = 4
-						end
-						device pnp 2e.f on         # COM6
-							io 0x60 = 0x2e0
-							irq 0x70 = 3
-						end
-					end # w83627uhg
-				end # LPC	0x439d
-				device pci 14.7 on  end # SD
+						device pnp 4e.14 off end    # PORT80
+						register "irq_trigger_type" = "0" # 0 edge, 1 level
+					end # nct5104d
+				end #LPC
+				device pci 14.7 off end # SD
+				device pci 16.0 on  end # USB
+				device pci 16.2 on  end # USB
 			end	#chip southbridge/amd/hudson
 
 			device pci 18.0 on  end
@@ -108,10 +88,8 @@ chip northbridge/amd/agesa/family16kb/root_complex
 			device pci 18.5 on  end
 			register "spdAddrLookup" = "
 			{
-				{ {0xA0, 0xA2}, {0x00, 0x00}, }, // socket 0 - Channel 0 & 1 - 8-bit SPD addresses
-				{ {0x00, 0x00}, {0x00, 0x00}, }, // socket 1 - Channel 0 & 1 - 8-bit SPD addresses
+				{ {0xA0, 0x00}, {0x00, 0x00}, }, // socket 0 - Channel 0 - 8-bit SPD addresses
 			}"
-
 		end	#chip northbridge/amd/agesa/family16kb # CPU side of HT root complex
 	end	#domain
 end	#northbridge/amd/agesa/family16kb/root_complex