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authorPatrick Rudolph <patrick.rudolph@9elements.com>2020-02-12 15:23:05 +0100
committerFelix Held <felix-coreboot@felixheld.de>2020-03-02 10:19:44 +0000
commite1498ce6da91c3e6bc61c67213f10ab927704510 (patch)
treec50a0b3d68878f0efd657dd0a503c36a2fc27e63 /src/mainboard/hp/compaq_8200_elite_sff
parent56626cf5d88523ed274c27e9624de7a358efe835 (diff)
downloadcoreboot-e1498ce6da91c3e6bc61c67213f10ab927704510.tar.xz
superio/nuvoton/npcd378: Switch to superio/common
Replace DSDT ACPI code and DSDT injection with a SSDT only solution. The current implementation shows some issues on current Linux, which might be due to external ACPI objects, which are then injected into DSDT or the fact that those objects only use 3 characters. Replace all the DSDT code with an SSDT generator. Tested on HP Z220: Boots into Linux with no ACPI errors. The SSDT can be disassembled. Change-Id: I41616d9bf320fd2b4d8495892b8190cd2a2d057f Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38862 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/mainboard/hp/compaq_8200_elite_sff')
-rw-r--r--src/mainboard/hp/compaq_8200_elite_sff/acpi/platform.asl2
-rw-r--r--src/mainboard/hp/compaq_8200_elite_sff/acpi/superio.asl14
-rw-r--r--src/mainboard/hp/compaq_8200_elite_sff/devicetree.cb184
3 files changed, 96 insertions, 104 deletions
diff --git a/src/mainboard/hp/compaq_8200_elite_sff/acpi/platform.asl b/src/mainboard/hp/compaq_8200_elite_sff/acpi/platform.asl
index 02a1b54b87..5a861f1f3b 100644
--- a/src/mainboard/hp/compaq_8200_elite_sff/acpi/platform.asl
+++ b/src/mainboard/hp/compaq_8200_elite_sff/acpi/platform.asl
@@ -15,6 +15,7 @@
Method(_WAK, 1, NotSerialized)
{
+ // Generated by SSDT
\_SB.PCI0.LPCB.SIO0.SIOW (Arg0)
Return(Package(){0,0})
@@ -22,5 +23,6 @@ Method(_WAK, 1, NotSerialized)
Method(_PTS, 1, NotSerialized)
{
+ // Generated by SSDT
\_SB.PCI0.LPCB.SIO0.SIOS (Arg0)
}
diff --git a/src/mainboard/hp/compaq_8200_elite_sff/acpi/superio.asl b/src/mainboard/hp/compaq_8200_elite_sff/acpi/superio.asl
index 630c5e8033..d6acae9c00 100644
--- a/src/mainboard/hp/compaq_8200_elite_sff/acpi/superio.asl
+++ b/src/mainboard/hp/compaq_8200_elite_sff/acpi/superio.asl
@@ -13,24 +13,10 @@
* GNU General Public License for more details.
*/
-
-#undef SUPERIO_DEV
-#undef SUPERIO_PNP_BASE
-#define SUPERIO_DEV SIO0
-#define SUPERIO_PNP_BASE 0x2e
-
-#define SUPERIO_SHOW_SP2
-#define SUPERIO_SHOW_KBC
-
#include <superio/nuvoton/npcd378/acpi/superio.asl>
Scope (\_GPE)
{
- Method (_L08, 0, NotSerialized)
- {
- \_SB.PCI0.LPCB.SIO0.SIOH ()
- }
-
Method (_L0D, 0, NotSerialized)
{
Notify (\_SB.PCI0.EHC1, 0x02)
diff --git a/src/mainboard/hp/compaq_8200_elite_sff/devicetree.cb b/src/mainboard/hp/compaq_8200_elite_sff/devicetree.cb
index 9dc18be9b9..915f87d450 100644
--- a/src/mainboard/hp/compaq_8200_elite_sff/devicetree.cb
+++ b/src/mainboard/hp/compaq_8200_elite_sff/devicetree.cb
@@ -75,100 +75,104 @@ chip northbridge/intel/sandybridge
device pci 1d.0 on end # USB2 EHCI #1
device pci 1e.0 on end # PCI bridge
device pci 1f.0 on # LPC bridge PCI-LPC bridge
- chip superio/nuvoton/npcd378
- device pnp 2e.0 off end # Floppy
- device pnp 2e.1 on # Parallel port
- # global
+ chip superio/common
+ device pnp 2e.ff on # passes SIO base addr to SSDT gen
+ chip superio/nuvoton/npcd378
+ device pnp 2e.0 off end # Floppy
+ device pnp 2e.1 on # Parallel port
+ # global
- # serialice: Vendor writes:
- irq 0x14 = 0x9c
- irq 0x1c = 0xa8
- irq 0x1d = 0x08
- irq 0x22 = 0x3f
- irq 0x1a = 0xb0
- # dumped from superiotool:
- irq 0x1b = 0x1e
- irq 0x27 = 0x04
- irq 0x2a = 0x00
- irq 0x2d = 0x01
- # parallel port
- io 0x60 = 0x378
- irq 0x70 = 0x07
- drq 0x74 = 0x01
- end
- device pnp 2e.2 off # COM1
- io 0x60 = 0x2f8
- irq 0x70 = 3
- end
- device pnp 2e.3 on # COM2, IR
- io 0x60 = 0x3f8
- irq 0x70 = 4
- end
- device pnp 2e.4 on # LED control
- io 0x60 = 0x600
- # IOBASE[0h] = bit0 LED red / green
- # IOBASE[0h] = bit1-4 LED PWM duty cycle
- # IOBASE[1h] = bit6 SWCC
+ # serialice: Vendor writes:
+ irq 0x14 = 0x9c
+ irq 0x1c = 0xa8
+ irq 0x1d = 0x08
+ irq 0x22 = 0x3f
+ irq 0x1a = 0xb0
+ # dumped from superiotool:
+ irq 0x1b = 0x1e
+ irq 0x27 = 0x08
+ irq 0x2a = 0x20
+ irq 0x2d = 0x01
+ # parallel port
+ io 0x60 = 0x378
+ irq 0x70 = 0x07
+ drq 0x74 = 0x01
+ end
+ device pnp 2e.2 off # COM1
+ io 0x60 = 0x2f8
+ irq 0x70 = 3
+ end
+ device pnp 2e.3 on # COM2, IR
+ io 0x60 = 0x3f8
+ irq 0x70 = 4
+ end
+ device pnp 2e.4 on # LED control
+ io 0x60 = 0x600
+ # IOBASE[0h] = bit0 LED red / green
+ # IOBASE[0h] = bit1-4 LED PWM duty cycle
+ # IOBASE[1h] = bit6 SWCC
- io 0x62 = 0x610
- # IOBASE [0h] = GPES
- # IOBASE [1h] = GPEE
- # IOBASE [4h:7h] = 32bit upcounter at 1Mhz
- # IOBASE [8h:bh] = GPS
- # IOBASE [ch:fh] = GPE
- end
- device pnp 2e.5 on # Mouse
- irq 0x70 = 0xc
- end
- device pnp 2e.6 on # Keyboard
- io 0x60 = 0x0060
- io 0x62 = 0x0064
- irq 0x70 = 0x01
- # serialice: Vendor writes:
- drq 0xf0 = 0x40
- end
- device pnp 2e.7 on # WDT ?
- io 0x60 = 0x620
- end
- device pnp 2e.8 on # HWM
- io 0x60 = 0x800
- # IOBASE[0h:feh] HWM page
- # IOBASE[ffh] bit0-bit3 page selector
+ io 0x62 = 0x610
+ # IOBASE [0h] = GPES
+ # IOBASE [1h] = GPEE
+ # IOBASE [4h:7h] = 32bit upcounter at 1Mhz
+ # IOBASE [8h:bh] = GPS
+ # IOBASE [ch:fh] = GPE
+ end
+ device pnp 2e.5 on # Mouse
+ irq 0x70 = 0xc
+ end
+ device pnp 2e.6 on # Keyboard
+ io 0x60 = 0x0060
+ io 0x62 = 0x0064
+ irq 0x70 = 0x01
+ # serialice: Vendor writes:
+ drq 0xf0 = 0x40
+ end
+ device pnp 2e.7 on # WDT ?
+ io 0x60 = 0x620
+ end
+ device pnp 2e.8 on # HWM
+ io 0x60 = 0x800
+ # IOBASE[0h:feh] HWM page
+ # IOBASE[ffh] bit0-bit3 page selector
- drq 0xf0 = 0x20
- drq 0xf1 = 0x01
- drq 0xf2 = 0x40
- drq 0xf3 = 0x01
+ drq 0xf0 = 0x20
+ drq 0xf1 = 0x01
+ drq 0xf2 = 0x40
+ drq 0xf3 = 0x01
- drq 0xf4 = 0x66
- drq 0xf5 = 0x67
- drq 0xf6 = 0x66
- drq 0xf7 = 0x01
- end
- device pnp 2e.f on # GPIO OD ?
- drq 0xf1 = 0x97
- drq 0xf2 = 0x01
- drq 0xf5 = 0x08
- drq 0xfe = 0x80
- end
- device pnp 2e.15 on # BUS ?
- io 0x60 = 0x0680
- io 0x62 = 0x0690
- end
- device pnp 2e.1c on # Suspend Control ?
- io 0x60 = 0x640
- # writing to IOBASE[5h]
- # 0x0: Power off
- # 0x9: Power off and bricked until CMOS battery removed
- end
- device pnp 2e.1e on # GPIO ?
- io 0x60 = 0x660
- drq 0xf4 = 0x01
- # skip the following, as it
- # looks like remapped registers
- #drq 0xf5 = 0x06
- #drq 0xf6 = 0x60
- #drq 0xfe = 0x03
+ drq 0xf4 = 0x66
+ drq 0xf5 = 0x67
+ drq 0xf6 = 0x66
+ drq 0xf7 = 0x01
+ end
+ device pnp 2e.f on # GPIO OD ?
+ drq 0xf1 = 0x97
+ drq 0xf2 = 0x01
+ drq 0xf5 = 0x08
+ drq 0xfe = 0x80
+ end
+ device pnp 2e.15 on # BUS ?
+ io 0x60 = 0x0680
+ io 0x62 = 0x0690
+ end
+ device pnp 2e.1c on # Suspend Control ?
+ io 0x60 = 0x640
+ # writing to IOBASE[5h]
+ # 0x0: Power off
+ # 0x9: Power off and bricked until CMOS battery removed
+ end
+ device pnp 2e.1e on # GPIO ?
+ io 0x60 = 0x660
+ drq 0xf4 = 0x01
+ # skip the following, as it
+ # looks like remapped registers
+ #drq 0xf5 = 0x06
+ #drq 0xf6 = 0x60
+ #drq 0xfe = 0x03
+ end
+ end
end
end
chip drivers/pc80/tpm