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| author | Uwe Hermann <uwe@hermann-uwe.de> | 2010-09-25 14:23:31 +0000 |
|---|---|---|
| committer | Uwe Hermann <uwe@hermann-uwe.de> | 2010-09-25 14:23:31 +0000 |
| commit | 370d979a93b1a63d1f8afc1ec2eb7cf54947ce35 (patch) | |
| tree | 938036d81b7d1a128d6d90c8d2d6a5bc4aa6287c /src/mainboard/hp/dl145_g3 | |
| parent | bcabf2fa749f0690da982aaba52d9045f231c119 (diff) | |
| download | coreboot-370d979a93b1a63d1f8afc1ec2eb7cf54947ce35.tar.xz | |
Various USB Debug Port fixes (trivial).
- Drop unused DBGP_DEFAULT #defines on boards with chipsets where no
USB Debug Port support is implemented anyway (at the moment, at least):
- hp/dl145_g3
- hp/dl165_g6_fam10
- ICH7: Move unrelated code out of set_debug_port(). All ICH southbridges
with Debug Port hardcode the physical USB port used as Debug Port to 1.
In other words, this port is not user-configurable (as seems to be
the case on NVIDIA MCP55). For now we keep the 'port' parameter in order
to not change the API, this might be fixed differently later.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5842 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/hp/dl145_g3')
| -rw-r--r-- | src/mainboard/hp/dl145_g3/romstage.c | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/src/mainboard/hp/dl145_g3/romstage.c b/src/mainboard/hp/dl145_g3/romstage.c index fb0d5eb5d5..8f3e21ddbe 100644 --- a/src/mainboard/hp/dl145_g3/romstage.c +++ b/src/mainboard/hp/dl145_g3/romstage.c @@ -44,8 +44,6 @@ #define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0 #endif -#define DBGP_DEFAULT 7 - #include <stdint.h> #include <string.h> #include <device/pci_def.h> |