More Kconfig-supported boards, and also kconfig support

for amd/socket_AM2R2, amd/socket_939, drivers/ati/ragexl

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4750 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

2 files changed, 138 insertions, 0 deletions

diff --git a/src/mainboard/hp/dl145_g3/Kconfig b/src/mainboard/hp/dl145_g3/Kconfig
new file mode 100644
index 0000000000..60cbcfe82a
--- /dev/null
+++ b/src/mainboard/hp/dl145_g3/Kconfig
@@ -0,0 +1,105 @@
+config BOARD_HP_DL145_G3
+	bool "DL145-G3"
+	select ARCH_X86
+	select CPU_AMD_K8
+	select CPU_AMD_SOCKET_F
+	select NORTHBRIDGE_AMD_AMDK8
+	select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
+	select SOUTHBRIDGE_BROADCOM_BCM21000
+	select SOUTHBRIDGE_BROADCOM_BCM5785
+	select SUPERIO_NSC_PC87417
+	select HAVE_PIRQ_TABLE
+	select USE_PRINTK_IN_CAR
+	select USE_DCACHE_RAM
+	select HAVE_HARD_RESET
+	select IOAPIC
+
+config MAINBOARD_DIR
+	string
+	default hp/dl145_g3
+	depends on BOARD_HP_DL145_G3
+
+config DCACHE_RAM_BASE
+	hex
+	default 0xcc000
+	depends on BOARD_HP_DL145_G3
+
+config DCACHE_RAM_SIZE
+	hex
+	default 0x04000
+	depends on BOARD_HP_DL145_G3
+
+config DCACHE_RAM_GLOBAL_VAR_SIZE
+	hex
+	default 0x01000
+	depends on BOARD_HP_DL145_G3
+
+config APIC_ID_OFFSET
+	hex
+	default 0x10
+	depends on BOARD_HP_DL145_G3
+
+config SB_HT_CHAIN_ON_BUS0
+	int
+	default 2
+	depends on BOARD_HP_DL145_G3
+
+config SB_HT_CHAIN_UNITID_OFFSET_ONLY
+	bool
+	default n
+	depends on BOARD_HP_DL145_G3
+
+config LB_CKS_RANGE_END
+	int
+	default 122
+	depends on BOARD_HP_DL145_G3
+
+config LB_CKS_LOC
+	int
+	default 123
+	depends on BOARD_HP_DL145_G3
+
+config MAINBOARD_PART_NUMBER
+	string
+	default "DL145G3"
+	depends on BOARD_HP_DL145_G3
+
+config HW_MEM_HOLE_SIZEK
+	hex
+	default 0x100000
+	depends on BOARD_HP_DL145_G3
+
+config MAX_CPUS
+	int
+	default 4
+	depends on BOARD_HP_DL145_G3
+
+config MAX_PHYSICAL_CPUS
+	int
+	default 2
+	depends on BOARD_HP_DL145_G3
+
+config HT_CHAIN_END_UNITID_BASE
+	hex
+	default 0x0
+	depends on BOARD_HP_DL145_G3
+
+config HT_CHAIN_UNITID_BASE
+	hex
+	default 0x0
+	depends on BOARD_HP_DL145_G3
+
+config USE_INIT
+	bool
+	default n
+	depends on BOARD_HP_DL145_G3
+
+config SB_HT_CHAIN_ON_BUS0
+	int
+	default 2
+	depends on BOARD_HP_DL145_G3
+
+config IRQ_SLOT_COUNT
+	int
+	default 15
+	depends on BOARD_HP_DL145_G3
diff --git a/src/mainboard/hp/dl145_g3/Makefile.inc b/src/mainboard/hp/dl145_g3/Makefile.inc
new file mode 100644
index 0000000000..e646f71f97
--- /dev/null
+++ b/src/mainboard/hp/dl145_g3/Makefile.inc
@@ -0,0 +1,33 @@
+driver-y += mainboard.o
+
+# Needed by irq_tables and mptable and acpi_tables.
+obj-y += get_bus_conf.o
+obj-$(CONFIG_HAVE_MP_TABLE) += mptable.o
+obj-$(CONFIG_HAVE_PIRQ_TABLE) += irq_tables.o
+
+# This is part of the conversion to init-obj and away from included code.
+
+initobj-y += crt0.o
+# FIXME in $(top)/Makefile
+crt0-y += ../../../../src/cpu/x86/16bit/entry16.inc
+crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc
+crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc
+crt0-y += ../../../../src/arch/i386/lib/id.inc
+crt0-y += ../../../../src/cpu/amd/car/cache_as_ram.inc
+crt0-y += auto.inc
+
+ldscript-y += ../../../../src/arch/i386/init/ldscript_fallback_cbfs.lb
+ldscript-y += ../../../../src/cpu/x86/16bit/entry16.lds
+ldscript-y += ../../../../src/cpu/x86/16bit/reset16.lds
+ldscript-y += ../../../../src/arch/i386/lib/id.lds
+ldscript-y += ../../../../src/arch/i386/lib/failover.lds
+
+ifdef POST_EVALUATION
+
+$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
+	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+	perl -e 's/\.rodata/.rom.data/g' -pi $@
+	perl -e 's/\.text/.section .rom.text/g' -pi $@
+
+endif
+