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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-01-04 06:02:22 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-01-09 12:44:52 +0000 |
| commit | 993bc7098c8ac6b607211b2e9050df35679670dd (patch) | |
| tree | 75b7f9cb72253065eb034bcddfdd64295c34d2ba /src/mainboard/hp/dl165_g6_fam10 | |
| parent | 611a5f821d74f3bdddfb7d3954b4d7381a3f2788 (diff) | |
| download | coreboot-993bc7098c8ac6b607211b2e9050df35679670dd.tar.xz | |
amdfam10 boards: Use smp_write_pci_intsrc()
Radically reduces line lengths and splits '(bus<<2) | INT'
to separate parameters.
Change-Id: I6c924a70d00a9139719f8078bbf1e4d04b576324
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/30739
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/mainboard/hp/dl165_g6_fam10')
| -rw-r--r-- | src/mainboard/hp/dl165_g6_fam10/mptable.c | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/src/mainboard/hp/dl165_g6_fam10/mptable.c b/src/mainboard/hp/dl165_g6_fam10/mptable.c index 9e5976feba..6c9a00127c 100644 --- a/src/mainboard/hp/dl165_g6_fam10/mptable.c +++ b/src/mainboard/hp/dl165_g6_fam10/mptable.c @@ -112,16 +112,16 @@ static void *smp_write_config_table(void *v) mptable_add_isa_interrupts(mc, isa_bus, m->apicid_bcm5785[0], 0); /* I/O Ints: Type Polarity/Trigger Bus ID IRQ APIC ID PIN# */ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_bcm5785_1, (0xe << 2)|0, m->apicid_bcm5785[0], 0x5); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_bcm5785_0, (0x3 << 2)|0, m->apicid_bcm5785[0], 0xa); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_bcm5785_0, (0x6 << 2)|0, m->apicid_bcm5785[2], 0x4); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_bcm5785_0, (0x7 << 2)|0, m->apicid_bcm5785[2], 0x3); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_bcm5785_0, (0x8 << 2)|0, m->apicid_bcm5785[2], 0x2); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_bcm5785_0, (0x9 << 2)|0, m->apicid_bcm5785[2], 0x1); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_bcm5785_0, (0xa << 2)|0, m->apicid_bcm5785[2], 0x0); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_bcm5785_1_1, (0x2 << 2)|0, m->apicid_bcm5785[2], 0x8); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_bcm5785_1_1, (0x2 << 2)|1, m->apicid_bcm5785[2], 0x7); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_bcm5780[5], (0x0 << 2)|0, m->apicid_bcm5785[2], 0xa); + smp_write_pci_intsrc(mc, mp_INT, m->bus_bcm5785_1, 0xe, 0, m->apicid_bcm5785[0], 0x5); + smp_write_pci_intsrc(mc, mp_INT, m->bus_bcm5785_0, 0x3, 0, m->apicid_bcm5785[0], 0xa); + smp_write_pci_intsrc(mc, mp_INT, m->bus_bcm5785_0, 0x6, 0, m->apicid_bcm5785[2], 0x4); + smp_write_pci_intsrc(mc, mp_INT, m->bus_bcm5785_0, 0x7, 0, m->apicid_bcm5785[2], 0x3); + smp_write_pci_intsrc(mc, mp_INT, m->bus_bcm5785_0, 0x8, 0, m->apicid_bcm5785[2], 0x2); + smp_write_pci_intsrc(mc, mp_INT, m->bus_bcm5785_0, 0x9, 0, m->apicid_bcm5785[2], 0x1); + smp_write_pci_intsrc(mc, mp_INT, m->bus_bcm5785_0, 0xa, 0, m->apicid_bcm5785[2], 0x0); + smp_write_pci_intsrc(mc, mp_INT, m->bus_bcm5785_1_1, 0x2, 0, m->apicid_bcm5785[2], 0x8); + smp_write_pci_intsrc(mc, mp_INT, m->bus_bcm5785_1_1, 0x2, 1, m->apicid_bcm5785[2], 0x7); + smp_write_pci_intsrc(mc, mp_INT, m->bus_bcm5780[5], 0x0, 0, m->apicid_bcm5785[2], 0xa); /* enable int */ /* why here? must get the BAR and PCI command bit 1 set before enable it ....*/ |