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author | Angel Pons <th3fanbus@gmail.com> | 2020-01-02 00:09:13 +0100 |
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committer | Nico Huber <nico.h@gmx.de> | 2020-01-20 09:01:22 +0000 |
commit | e4faf5a209fe38f269f6ebf5292c3f424348949c (patch) | |
tree | e0fb578479ae8bf87dcb68f02a33a1431a4dff7e /src/mainboard/hp/snb_ivb_laptops/variants/8470p/early_init.c | |
parent | 5aee8262d592ed3ca229d0d75690e6a948602b59 (diff) | |
download | coreboot-e4faf5a209fe38f269f6ebf5292c3f424348949c.tar.xz |
mb/hp/8470p: Transform into variant
Tested with BUILD_TIMELESS=1, binary does not change.
Change-Id: I6dbecb0b4d38ed4af8966f5391fce1f2c9c5d182
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38093
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/mainboard/hp/snb_ivb_laptops/variants/8470p/early_init.c')
-rw-r--r-- | src/mainboard/hp/snb_ivb_laptops/variants/8470p/early_init.c | 57 |
1 files changed, 57 insertions, 0 deletions
diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/8470p/early_init.c b/src/mainboard/hp/snb_ivb_laptops/variants/8470p/early_init.c new file mode 100644 index 0000000000..51b0b4dcbb --- /dev/null +++ b/src/mainboard/hp/snb_ivb_laptops/variants/8470p/early_init.c @@ -0,0 +1,57 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2017 Iru Cai <mytbk920423@gmail.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <bootblock_common.h> +#include <northbridge/intel/sandybridge/sandybridge.h> +#include <northbridge/intel/sandybridge/raminit_native.h> +#include <southbridge/intel/bd82x6x/pch.h> +#include <superio/smsc/lpc47n217/lpc47n217.h> +#include <ec/hp/kbc1126/ec.h> + +#define SERIAL_DEV PNP_DEV(0x4e, LPC47N217_SP1) + +const struct southbridge_usb_port mainboard_usb_ports[] = { + { 1, 1, 0 }, + { 1, 1, 0 }, + { 1, 1, 1 }, + { 1, 1, 1 }, + { 1, 0, 2 }, + { 0, 0, 2 }, + { 0, 0, 3 }, + { 1, 0, 3 }, + { 1, 1, 4 }, + { 1, 1, 4 }, + { 1, 0, 5 }, + { 1, 0, 5 }, + { 1, 0, 6 }, + { 1, 0, 6 }, +}; + +void bootblock_mainboard_early_init(void) +{ + lpc47n217_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); + kbc1126_enter_conf(); + kbc1126_mailbox_init(); + kbc1126_kbc_init(); + kbc1126_ec_init(); + kbc1126_pm1_init(); + kbc1126_exit_conf(); +} + +void mainboard_get_spd(spd_raw_data *spd, bool id_only) +{ + read_spd(&spd[0], 0x50, id_only); + read_spd(&spd[2], 0x52, id_only); +} |