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author | Duncan Laurie <dlaurie@chromium.org> | 2017-01-21 19:11:37 -0800 |
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committer | Duncan Laurie <dlaurie@chromium.org> | 2017-01-22 19:25:15 +0100 |
commit | 949e34c3ee85524f5b0a27b72d3064752aa3d097 (patch) | |
tree | 8f85becc8ee5b49b3ba85b75eb7933dd88b9793f /src/mainboard/hp | |
parent | e00365217cf30c7b8510fca0e7e60d0905b73752 (diff) | |
download | coreboot-949e34c3ee85524f5b0a27b72d3064752aa3d097.tar.xz |
google/eve: Fixes for devicetree settings
The devicetree settings were incorrect in a few places with
respect to the SOC and board design:
- IMVP8 VR workaround is for MP2939 and not MP2949 on Eve
- IccMax values are incorrect according to KBL-Y EDS
- USB2[6] is incorrectly labeled
- I2C touch devices do not need probed as they are not optional
- PCIe Root Port 5 should be enabled
- I2C5 device should not be enabled as it is unused
BUG=chrome-os-partner:58666
TEST=manually tested on Eve board
Change-Id: I74e092444ead4b40c6d8091b80a691d44e2c6c7d
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://review.coreboot.org/18200
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/mainboard/hp')
0 files changed, 0 insertions, 0 deletions