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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-11-21 08:40:55 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-12-03 08:04:18 +0100 |
| commit | 2fd006a3e335570fda1e3b2bf00288103e9fac6d (patch) | |
| tree | 5ac80e777999d935153ffb02e68ef2faab823b2e /src/mainboard/hp | |
| parent | 7d8cde756e0e4d1fc14734eca721e4a55046b2d1 (diff) | |
| download | coreboot-2fd006a3e335570fda1e3b2bf00288103e9fac6d.tar.xz | |
AGESA Hudson/Yangtze: Remove unused GPP configuration in devicetree
GPP config from devicetree.cb is not implemented for fam15tn/fam16kb.
Also only for asus/f2a85-m the configuration value matched the actual
programming.
Change-Id: Ic7a9aa1360f4ba35d202f3f7dd1fc3c20a52dde0
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/7600
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/mainboard/hp')
| -rw-r--r-- | src/mainboard/hp/pavilion_m6_1035dx/devicetree.cb | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/mainboard/hp/pavilion_m6_1035dx/devicetree.cb b/src/mainboard/hp/pavilion_m6_1035dx/devicetree.cb index 895437b1c6..2791262701 100644 --- a/src/mainboard/hp/pavilion_m6_1035dx/devicetree.cb +++ b/src/mainboard/hp/pavilion_m6_1035dx/devicetree.cb @@ -68,7 +68,6 @@ chip northbridge/amd/agesa/family15tn/root_complex device pci 15.1 off end # PCIe 1 device pci 15.2 off end # PCIe 2 device pci 15.3 off end # PCIe 3 - register "gpp_configuration" = "4" end #chip southbridge/amd/hudson device pci 18.0 on end |