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| author | Elyes HAOUAS <ehaouas@noos.fr> | 2018-02-01 09:04:09 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-05-03 08:24:59 +0000 |
| commit | fabd0f4fa8392f9d8a756ba96c09a656a1682e9f (patch) | |
| tree | 40993ab5f004c0e213fba17d270e012208695f10 /src/mainboard/hp | |
| parent | d3c0c0c318d2e2b5a3d6276bb0fdd732170756d3 (diff) | |
| download | coreboot-fabd0f4fa8392f9d8a756ba96c09a656a1682e9f.tar.xz | |
mainboard/hp/dl145_g1: Fix coding style
Change-Id: I8cfddbf49b3042d46956985425990360f0903b1f
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/23531
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/mainboard/hp')
| -rw-r--r-- | src/mainboard/hp/dl145_g1/get_bus_conf.c | 23 | ||||
| -rw-r--r-- | src/mainboard/hp/dl145_g1/romstage.c | 6 |
2 files changed, 11 insertions, 18 deletions
diff --git a/src/mainboard/hp/dl145_g1/get_bus_conf.c b/src/mainboard/hp/dl145_g1/get_bus_conf.c index da02095855..7a9e3b54cd 100644 --- a/src/mainboard/hp/dl145_g1/get_bus_conf.c +++ b/src/mainboard/hp/dl145_g1/get_bus_conf.c @@ -52,7 +52,8 @@ void get_bus_conf(void) device_t dev; int i; - if(get_bus_conf_done == 1) return; //do it only once + if (get_bus_conf_done == 1) + return; //do it only once get_bus_conf_done = 1; @@ -60,7 +61,7 @@ void get_bus_conf(void) struct mb_sysconf_t *m = sysconf.mb; sysconf.hc_possible_num = ARRAY_SIZE(pci1234x); - for(i = 0; i < sysconf.hc_possible_num; i++) { + for (i = 0; i < sysconf.hc_possible_num; i++) { sysconf.pci1234[i] = pci1234x[i]; sysconf.hcdn[i] = hcdnx[i]; } @@ -75,30 +76,24 @@ void get_bus_conf(void) /* 8111 */ dev = dev_find_slot(m->bus_8111_0, PCI_DEVFN(sysconf.sbdn,0)); - if (dev) { + if (dev) m->bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS); - } - else { + else printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:03.0, using defaults\n", m->bus_8111_0); - } /* 8131-1 */ dev = dev_find_slot(m->bus_8131_0, PCI_DEVFN(m->sbdn3,0)); - if (dev) { + if (dev) m->bus_8131_1 = pci_read_config8(dev, PCI_SECONDARY_BUS); - } - else { + else printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:01.0, using defaults\n", m->bus_8131_0); - } /* 8131-2 */ dev = dev_find_slot(m->bus_8131_0, PCI_DEVFN(m->sbdn3+1,0)); - if (dev) { + if (dev) m->bus_8131_2 = pci_read_config8(dev, PCI_SECONDARY_BUS); - } - else { + else printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:02.0, using defaults\n", m->bus_8131_0); - } /*I/O APICs: APIC ID Version State Address*/ diff --git a/src/mainboard/hp/dl145_g1/romstage.c b/src/mainboard/hp/dl145_g1/romstage.c index 91f03a7f3d..1ef3658a62 100644 --- a/src/mainboard/hp/dl145_g1/romstage.c +++ b/src/mainboard/hp/dl145_g1/romstage.c @@ -175,12 +175,10 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) enable_smbus(); int i; - for(i = 0; i < 2; i++) { + for (i = 0; i < 2; i++) activate_spd_rom(&sysinfo->ctrl[i]); - } - for(i = RC0; i <= RC1; i<<=1) { + for (i = RC0; i <= RC1; i <<= 1) change_i2c_mux(i); - } //dump_spd_registers(&sysinfo->ctrl[0]); //dump_spd_registers(&sysinfo->ctrl[1]); |