diff options
| author | Bernhard M. Wiedemann <corebootbmw@lsmod.de> | 2010-05-30 12:56:17 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2010-05-30 12:56:17 +0000 |
| commit | 6e554de0988fb1fd3e02aca6b6f2fc10c8fdc7ee (patch) | |
| tree | ba9b96395e63bad1e1bfdd5ecd2d0cf9cc99ce42 /src/mainboard/ibase/mb899/dsdt.asl | |
| parent | 1c60c88679f692dee5e547e58b4124c8639d4f07 (diff) | |
| download | coreboot-6e554de0988fb1fd3e02aca6b6f2fc10c8fdc7ee.tar.xz | |
This patch adds support for mainboard iBASE:MB899
based on Kontron 986LCD-M
changed superIO chip to w83627ehg, dropping MIDI
dropped second superIO at 4e
changed superIO-addr from 2e to 4e
adjusted irq_tables.c and devicetree.cb
dropped setup of 3xGBit-Ethernet
adjusted IRQ-map (using values from mainboard/intel/d945gclf)
disabled parts about HD-audio (missing on that board)
Signed-off-by: Bernhard M. Wiedemann <corebootbmw@lsmod.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5599 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/ibase/mb899/dsdt.asl')
| -rw-r--r-- | src/mainboard/ibase/mb899/dsdt.asl | 50 |
1 files changed, 50 insertions, 0 deletions
diff --git a/src/mainboard/ibase/mb899/dsdt.asl b/src/mainboard/ibase/mb899/dsdt.asl new file mode 100644 index 0000000000..f06b225fe0 --- /dev/null +++ b/src/mainboard/ibase/mb899/dsdt.asl @@ -0,0 +1,50 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007-2009 coresystems GmbH + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +DefinitionBlock( + "dsdt.aml", + "DSDT", + 0x02, // DSDT revision: ACPI v2.0 + "COREv2", // OEM id + "COREBOOT", // OEM table id + 0x20090419 // OEM revision +) +{ + // Some generic macros + #include "acpi/platform.asl" + + // global NVS and variables + #include "../../../southbridge/intel/i82801gx/acpi/globalnvs.asl" + + // General Purpose Events + //#include "acpi/gpe.asl" + + //#include "acpi/thermal.asl" + + Scope (\_SB) { + Device (PCI0) + { + #include "../../../northbridge/intel/i945/acpi/i945.asl" + #include "../../../southbridge/intel/i82801gx/acpi/ich7.asl" + } + } + + /* Chipset specific sleep states */ + #include "../../../southbridge/intel/i82801gx/acpi/sleepstates.asl" +} |