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authorUwe Hermann <uwe@hermann-uwe.de>2010-09-25 14:23:31 +0000
committerUwe Hermann <uwe@hermann-uwe.de>2010-09-25 14:23:31 +0000
commit370d979a93b1a63d1f8afc1ec2eb7cf54947ce35 (patch)
tree938036d81b7d1a128d6d90c8d2d6a5bc4aa6287c /src/mainboard/ibase
parentbcabf2fa749f0690da982aaba52d9045f231c119 (diff)
downloadcoreboot-370d979a93b1a63d1f8afc1ec2eb7cf54947ce35.tar.xz
Various USB Debug Port fixes (trivial).
- Drop unused DBGP_DEFAULT #defines on boards with chipsets where no USB Debug Port support is implemented anyway (at the moment, at least): - hp/dl145_g3 - hp/dl165_g6_fam10 - ICH7: Move unrelated code out of set_debug_port(). All ICH southbridges with Debug Port hardcode the physical USB port used as Debug Port to 1. In other words, this port is not user-configurable (as seems to be the case on NVIDIA MCP55). For now we keep the 'port' parameter in order to not change the API, this might be fixed differently later. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5842 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/ibase')
-rw-r--r--src/mainboard/ibase/mb899/romstage.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/src/mainboard/ibase/mb899/romstage.c b/src/mainboard/ibase/mb899/romstage.c
index 8d4ca81254..4c953d7ab1 100644
--- a/src/mainboard/ibase/mb899/romstage.c
+++ b/src/mainboard/ibase/mb899/romstage.c
@@ -40,7 +40,6 @@
#include <cpu/x86/bist.h>
#if CONFIG_USBDEBUG
-#define DBGP_DEFAULT 1
#include "southbridge/intel/i82801gx/i82801gx_usb_debug.c"
#include "pc80/usbdebug_serial.c"
#endif
@@ -275,7 +274,7 @@ void main(unsigned long bist)
uart_init();
#if CONFIG_USBDEBUG
- i82801gx_enable_usbdebug(DBGP_DEFAULT);
+ i82801gx_enable_usbdebug(1);
early_usbdebug_init();
#endif