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authorMario Scheithauer <mario.scheithauer@siemens.com>2018-08-23 15:33:53 +0200
committerWerner Zeh <werner.zeh@siemens.com>2018-08-31 04:11:43 +0000
commite27c096b7f20e5f5424f1e912d7a88d820285e71 (patch)
tree9eaff5bee3ab14985a9d878480f2950d9522e5ef /src/mainboard/ibase
parentaef592d9b66aa18d83b0a211ead26013ff1f7d98 (diff)
downloadcoreboot-e27c096b7f20e5f5424f1e912d7a88d820285e71.tar.xz
siemens/mc_apl1: Correct the Tx signal from SATA interface
Because of an incorrect transmit voltage swing, the signal must be adjusted. The factor of slices for full swing level can be corrected via the High Speed I/O Transmit Control Register 3. Change-Id: I116802cd2a944658fc3022e948eba43cebe52bb4 Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com> Reviewed-on: https://review.coreboot.org/28285 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-by: Alex Thiessen <alex.thiessen.de+coreboot@gmail.com>
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