corrected irq and mp table according to new bus enumeration

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1542 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

3 files changed, 28 insertions, 21 deletions

diff --git a/src/mainboard/ibm/e325/irq_tables.c b/src/mainboard/ibm/e325/irq_tables.c
index 569432937a..008d512a42 100644
--- a/src/mainboard/ibm/e325/irq_tables.c
+++ b/src/mainboard/ibm/e325/irq_tables.c
@@ -1,6 +1,7 @@
 #include <arch/pirq_routing.h>
 #include <device/pci.h>
 
+#define IRQ_SLOT_COUNT 12
 #define IRQ_ROUTER_BUS		0
 #define IRQ_ROUTER_DEVFN	PCI_DEVFN(4,3)
 #define IRQ_ROUTER_VENDOR	0x1022
@@ -26,31 +27,31 @@ const struct irq_routing_table intel_irq_routing_table = {
 	IRQ_ROUTER_DEVICE,	/* Device */
 	0x00,			/* Crap (miniport) */
 	{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
-	0x45,           /*  u8 checksum , mod 256 checksum must give zero */
+	0x34,			/*  u8 checksum , mod 256 checksum must give zero */
 	{	/* slot(0=onboard), devfn, irqlinks (line id, 0=not routed) */
 		/* Northbridge, Node 0 */
 		IRQ_SLOT(0x0, 0x00,0x18,0x0, 0,0,0,0),
 		/* AMD-8131 PCI-X Bridge */
-		IRQ_SLOT(0x0, 0x00,0x01,0x0, 0,0,0,0),
+		IRQ_SLOT(0x0, 0x01,0x01,0x0, 0,0,0,0),
 		/* Onboard LSI SCSI Controller */
-		IRQ_SLOT(0x0, 0x01,0x02,0x0, 3,0,0,0),
+		IRQ_SLOT(0x0, 0x02,0x02,0x0, 3,0,0,0),
 		/* Onboard Broadcom NICs */
-		IRQ_SLOT(0x0, 0x01,0x01,0x0, 1,2,0,0),
+		IRQ_SLOT(0x0, 0x02,0x01,0x0, 1,2,0,0),
 		/* AMD-8131 PCI-X Bridge */
-		IRQ_SLOT(0x0, 0x00,0x02,0x0, 0,0,0,0),
+		IRQ_SLOT(0x0, 0x01,0x02,0x0, 0,0,0,0),
 		/* PCI Slot 1-2 */
-		IRQ_SLOT(0x1, 0x02,0x03,0x0, 1,2,3,4),
-		IRQ_SLOT(0x2, 0x02,0x04,0x0, 2,3,4,1),
+		IRQ_SLOT(0x1, 0x03,0x03,0x0, 1,2,3,4),
+		IRQ_SLOT(0x2, 0x03,0x04,0x0, 2,3,4,1),
 		/* AMD-8111 PCI Bridge */
-		IRQ_SLOT(0x0, 0x00,0x03,0x0, 0,0,0,0),
+		IRQ_SLOT(0x0, 0x01,0x03,0x0, 0,0,0,0),
 		/* USB Controller */
-		IRQ_SLOT(0x0, 0x03,0x00,0x0, 0,0,0,4),
+		IRQ_SLOT(0x0, 0x04,0x00,0x0, 0,0,0,4),
 		/* ATI Rage XL VGA */
-		IRQ_SLOT(0x0, 0x03,0x05,0x0, 1,0,0,0),
+		IRQ_SLOT(0x0, 0x04,0x05,0x0, 1,0,0,0),
 		/* AMD-8111 LPC Dridge */
-		IRQ_SLOT(0x0, 0x00,0x04,0x0, 0,0,0,0),
+		IRQ_SLOT(0x0, 0x01,0x04,0x0, 0,0,0,0),
 		/* Northbridge, Node 1 */
-		IRQ_SLOT(0x0, 0x00,0x18,0x0, 0,0,0,0),
+		IRQ_SLOT(0x0, 0x00,0x19,0x0, 0,0,0,0),
 
 	}
 };
diff --git a/src/mainboard/ibm/e325/mainboard.c b/src/mainboard/ibm/e325/mainboard.c
index cfe239343c..85ad28a891 100644
--- a/src/mainboard/ibm/e325/mainboard.c
+++ b/src/mainboard/ibm/e325/mainboard.c
@@ -272,13 +272,19 @@ static struct device_operations mainboard_operations = {
 static void enumerate(struct chip *chip)
 {
 	struct chip *child;
+
+	if (chip->control && chip->control->name) {
+		printk_debug("Enumerating: %s\n", chip->control->name);
+	}
+
 	dev_root.ops = &mainboard_operations;
 	chip->dev = &dev_root;
 	chip->bus = 0;
-	for(child = chip->children; child; child = child->next) {
+	for (child = chip->children; child; child = child->next) {
 		child->bus = &dev_root.link[0];
 	}
 }
+
 struct chip_control mainboard_ibm_e325_control = {
 	.enumerate = enumerate, 
 	.name      = "IBM E325 mainboard ",
diff --git a/src/mainboard/ibm/e325/mptable.c b/src/mainboard/ibm/e325/mptable.c
index 68c30fcaeb..bc9d52f262 100644
--- a/src/mainboard/ibm/e325/mptable.c
+++ b/src/mainboard/ibm/e325/mptable.c
@@ -41,34 +41,34 @@ void *smp_write_config_table(void *v, unsigned long * processor_map)
 		device_t dev;
 
 		/* 8111 */
-		dev = dev_find_slot(0, PCI_DEVFN(0x03,0));
+		dev = dev_find_slot(1, PCI_DEVFN(0x03,0));
 		if (dev) {
                 	bus_8111_0 = pci_read_config8(dev, PCI_PRIMARY_BUS);
 			bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
 			bus_isa	   = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
 			bus_isa++;
 		} else {
-			printk_debug("ERROR - could not find PCI 0:03.0, using defaults\n");
+			printk_debug("ERROR - could not find PCI 1:03.0, using defaults\n");
 			bus_8111_1 = 4;
 			bus_isa = 5;
 		}
 
 		/* 8131-1 */
-		dev = dev_find_slot(0, PCI_DEVFN(0x01,0));
+		dev = dev_find_slot(1, PCI_DEVFN(0x01,0));
 		if (dev) {
 			bus_8131_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
 
 		} else {
-			printk_debug("ERROR - could not find PCI 0:01.0, using defaults\n");
+			printk_debug("ERROR - could not find PCI 1:01.0, using defaults\n");
 			bus_8131_1 = 2;
 		}
 
 		/* 8131-2 */
-		dev = dev_find_slot(0, PCI_DEVFN(0x02,0));
+		dev = dev_find_slot(1, PCI_DEVFN(0x02,0));
 		if (dev) {
 			bus_8131_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
 		} else {
-			printk_debug("ERROR - could not find PCI 0:02.0, using defaults\n");
+			printk_debug("ERROR - could not find PCI 1:02.0, using defaults\n");
 			bus_8131_2 = 3;
 		}
 	}
@@ -85,14 +85,14 @@ void *smp_write_config_table(void *v, unsigned long * processor_map)
 		device_t dev;
 		uint32_t base;
 		/* 8131-1 apic #3 */
-		dev = dev_find_slot(0, PCI_DEVFN(0x01,1));
+		dev = dev_find_slot(1, PCI_DEVFN(0x01,1));
 		if (dev) {
 			base = pci_read_config32(dev, PCI_BASE_ADDRESS_0);
 			base &= PCI_BASE_ADDRESS_MEM_MASK;
 			smp_write_ioapic(mc, 0x03, 0x11, base);
 		}
 		/* 8131-2 apic #4 */
-		dev = dev_find_slot(0, PCI_DEVFN(0x02,1));
+		dev = dev_find_slot(1, PCI_DEVFN(0x02,1));
  		if (dev) {
 			base = pci_read_config32(dev, PCI_BASE_ADDRESS_0);
 			base &= PCI_BASE_ADDRESS_MEM_MASK;