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| author | Jason Schildt <jschildt@gmail.com> | 2005-10-25 21:46:09 +0000 |
|---|---|---|
| committer | Jason Schildt <jschildt@gmail.com> | 2005-10-25 21:46:09 +0000 |
| commit | f274d94360a8b5e80b688f5005a8e4a1da8bfe5f (patch) | |
| tree | ac6d87740b1c665d5ed0545e9de152a84d5c0da2 /src/mainboard/ibm | |
| parent | fddf46f275f27b20a05ff761c4e267fd619e9664 (diff) | |
| download | coreboot-f274d94360a8b5e80b688f5005a8e4a1da8bfe5f.tar.xz | |
- See Issue Tracker id-13 "lnxi-patch-13".
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2077 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/ibm')
| -rw-r--r-- | src/mainboard/ibm/e325/failover.c | 11 | ||||
| -rw-r--r-- | src/mainboard/ibm/e326/failover.c | 11 |
2 files changed, 6 insertions, 16 deletions
diff --git a/src/mainboard/ibm/e325/failover.c b/src/mainboard/ibm/e325/failover.c index ed5ce32d81..acea55ce35 100644 --- a/src/mainboard/ibm/e325/failover.c +++ b/src/mainboard/ibm/e325/failover.c @@ -9,6 +9,7 @@ #include "southbridge/amd/amd8111/amd8111_enable_rom.c" #include "northbridge/amd/amdk8/early_ht.c" #include "cpu/x86/lapic/boot_cpu.c" +#include "cpu/x86/mtrr/earlymtrr.c" #include "northbridge/amd/amdk8/reset_test.c" static unsigned long main(unsigned long bist) @@ -20,11 +21,11 @@ static unsigned long main(unsigned long bist) nodeid = lapicid() & 0xf; /* Is this a cpu only reset? */ - if (cpu_init_detected(nodeid)) { + if (early_mtrr_init_detected()) { if (last_boot_normal()) { goto normal_image; } else { - goto cpu_reset; + goto fallback_image; } } /* Is this a secondary cpu? */ @@ -61,12 +62,6 @@ static unsigned long main(unsigned long bist) : "a" (bist) /* inputs */ : /* clobbers */ ); - cpu_reset: - asm volatile ("jmp __cpu_reset" - : /* outputs */ - : "a"(bist) /* inputs */ - : /* clobbers */ - ); fallback_image: return bist; } diff --git a/src/mainboard/ibm/e326/failover.c b/src/mainboard/ibm/e326/failover.c index ed5ce32d81..acea55ce35 100644 --- a/src/mainboard/ibm/e326/failover.c +++ b/src/mainboard/ibm/e326/failover.c @@ -9,6 +9,7 @@ #include "southbridge/amd/amd8111/amd8111_enable_rom.c" #include "northbridge/amd/amdk8/early_ht.c" #include "cpu/x86/lapic/boot_cpu.c" +#include "cpu/x86/mtrr/earlymtrr.c" #include "northbridge/amd/amdk8/reset_test.c" static unsigned long main(unsigned long bist) @@ -20,11 +21,11 @@ static unsigned long main(unsigned long bist) nodeid = lapicid() & 0xf; /* Is this a cpu only reset? */ - if (cpu_init_detected(nodeid)) { + if (early_mtrr_init_detected()) { if (last_boot_normal()) { goto normal_image; } else { - goto cpu_reset; + goto fallback_image; } } /* Is this a secondary cpu? */ @@ -61,12 +62,6 @@ static unsigned long main(unsigned long bist) : "a" (bist) /* inputs */ : /* clobbers */ ); - cpu_reset: - asm volatile ("jmp __cpu_reset" - : /* outputs */ - : "a"(bist) /* inputs */ - : /* clobbers */ - ); fallback_image: return bist; } |