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author | Stefan Reinauer <stepan@openbios.org> | 2004-10-21 17:06:49 +0000 |
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committer | Stefan Reinauer <stepan@openbios.org> | 2004-10-21 17:06:49 +0000 |
commit | a49f4161f5631760309ba47b925183736a754717 (patch) | |
tree | 34175ea6c904dc857fdb353407bef66116bcf748 /src/mainboard/ibm | |
parent | dbec2d4090e40d1d8e1fd06e8d4180d3fa685d4d (diff) | |
download | coreboot-a49f4161f5631760309ba47b925183736a754717.tar.xz |
update failover handling of some amd64 boards
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1699 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/ibm')
-rw-r--r-- | src/mainboard/ibm/e325/failover.c | 19 |
1 files changed, 4 insertions, 15 deletions
diff --git a/src/mainboard/ibm/e325/failover.c b/src/mainboard/ibm/e325/failover.c index b22abfea06..e351cae83d 100644 --- a/src/mainboard/ibm/e325/failover.c +++ b/src/mainboard/ibm/e325/failover.c @@ -4,22 +4,15 @@ #include <device/pci_ids.h> #include <arch/io.h> #include <arch/romcc_io.h> -#include <arch/smp/lapic.h> +#include <cpu/x86/lapic.h> #include "pc80/mc146818rtc_early.c" #include "southbridge/amd/amd8111/amd8111_enable_rom.c" #include "northbridge/amd/amdk8/early_ht.c" -#include "cpu/p6/boot_cpu.c" +#include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" -#define HAVE_REGPARM_SUPPORT 0 -#if HAVE_REGPARM_SUPPORT static unsigned long main(unsigned long bist) { -#else -static void main(void) -{ - unsigned long bist = 0; -#endif /* Make cerain my local apic is useable */ enable_lapic(); @@ -60,21 +53,17 @@ static void main(void) goto fallback_image; } normal_image: - asm("jmp __normal_image" + asm volatile ("jmp __normal_image" : /* outputs */ : "a" (bist) /* inputs */ : /* clobbers */ ); cpu_reset: - asm("jmp __cpu_reset" + asm volatile ("jmp __cpu_reset" : /* outputs */ : "a"(bist) /* inputs */ : /* clobbers */ ); fallback_image: -#if HAVE_REGPARM_SUPPORT return bist; -#else - return; -#endif } |